Verification and debugging of IDDQ test of low power chips.
Michael LaisneTriphuong NguyenSong-lin ZuoXiangdong PanHailong CuiCher BaiA. StreetM. ParleyNeetu AgrawalK. SundararamanPublished in: ITC (2007)
Keyphrases
- low power
- high speed
- power consumption
- low cost
- vlsi architecture
- single chip
- high power
- low power consumption
- software testing
- wireless transmission
- hardware designs
- digital signal processing
- logic circuits
- power reduction
- vlsi circuits
- mixed signal
- integrated circuit
- ultra low power
- power dissipation
- cmos technology
- wireless sensor networks
- frame rate
- model checking
- general purpose