Friedel Gerfers

ORCID

Publication Activity (10 Years)

Years Active: 2000-2024
Publications (10 Years): 73

Top Venues

Publications

Enne Wittenhagen, Dominik Wilding, Patrick Kurth, Sebastian Linnhoff, Frowin Buballa, Urs Hecht, Patrick J. Artz, Friedel Gerfers
An 11-Bit 12 GS/s Beam-Forming Receiver ADC for a 2x2 Antenna Array utilizing True Time-Delay with 68 dBc SFDR and 55 dB SNDR. ISCAS (2024)
Kai Misselwitz, Friedel Gerfers
A 16 GS/s Voltage-to-Time Conversion Sampler with 35.9 dB SNDR in 22 nm CMOS FDSOI. ISCAS (2024)
Patrick Kurth, Philipp Scholz, Philipp Nickel, Urs Hecht, Enne Wittenhagen, Kai Misselwitz, Friedel Gerfers
A mmw Low-Noise Sub-Sampling Phase-Locked Loop with a Non-Pulsed Charge Pump, Frequency Calibration and a Compact Ultra-High-Q Resonator. ISCAS (2024)
Johannes Zink, Frank Ludwig, Szymon Jablonski, Uros Mavric, Michael Fenner, Stanislav Chystiakov, Holger Schlarb, Friedel Gerfers
A Multiport Coaxial Interconnection for MTCA.4 Based High-Frequency Instrumentation Applications. IEEE Trans. Instrum. Meas. 73 (2024)
Dennis Osterland, Andreas Benzin, Friedel Gerfers, Giuseppe Caire
Undersampling and SNR Degradation in Practical Direct RF Sampling Systems. EuCNC/6G Summit (2023)
Jamila Josip Borda, Friedel Gerfers
25Gbps Automotive Ethernet: System PHY Characterization of ESD Based EM Interferences. ETFA (2023)
Urs Hecht, Helia Ordouei, Nikolay Ledentsov Jr., Philipp Scholz, Patrick Kurth, Nikolay N. Ledentsov, Friedel Gerfers
True Voltage-Mode NRZ VCSEL Transmitter enabling 60 Gbit/s at 0.37 pJ/bit in 22 nm FDSOI. ESSCIRC (2023)
Urs Hecht, Helia Ordouei, Nikolay Ledentsov Jr., Philipp Scholz, Patrick Kurth, Ilya E. Titkov, Nikolay N. Ledentsov, Friedel Gerfers
A 0.4 pJ/bit NRZ Voltage Mode VCSEL Driver for up to 224 Gbit/s SWDM Links. OFC (2023)
Enne Wittenhagen, Patrick Kurth, Urs Hecht, Frowin Buballa, Sebastian Linnhoff, Nima Lotfi, Friedel Gerfers
A 12 GS/s RF-Sampler Employing Inductive Peaking with >57 dB |THD| and >49.3 dB SNDR in 22 nm FD-SOI CMOS. NEWCAS (2023)
Julius Edler, Marcel Runge, Sebastian Linnhoff, Friedel Gerfers
A 4.4 GS/s 220 MHz ΣΔ ADC with a Linearized Back-Gate Controlled GmC Filter. VLSI Technology and Circuits (2023)
Tobias Kaiser, Friedel Gerfers
CGRA in 22 nm FD-SOI With RISC-Like Code Generation. COOL CHIPS (2023)
Patrick Kurth, Urs Hecht, Frowin Buballa, Sebastian Linnhoff, Helia Ordouei, Friedel Gerfers
A Charge Pump for Sub-Sampling Phase-Locked Loops with Virtual Reference Frequency Doubling. ISCAS (2023)
Marcel Runge, Julius Edler, Tobias Kaiser, Kai Misselwitz, Friedel Gerfers
An 18-MS/s 76-dB SNDR Continuous-Time Δ Σ Modulator Incorporating an Input Voltage Tracking GmC Loop Filter. IEEE J. Solid State Circuits 58 (8) (2023)
Jamila Josip Borda, Kirsten Matheus, Friedel Gerfers
25Gbps Automotive Ethernet ECU PCB: MDI Design Implementation and Insertion Loss Characterization. VEHITS (2023)
Helia Ordouei, Clirim Alija, Patrick Kurth, Friedel Gerfers
A Digital Pre-Distortion Technique Canceling Code-and Voltage-Dependent Output Impedance Errors in Current-Steering DACs. ISCAS (2023)
Frowin Buballa, Sebastian Linnhoff, Enne Wittenhagen, Urs Hecht, Friedel Gerfers
A 4 GBaud 5 Vpp Class-B Pre-Driver Design for GaN-Based Switching Power Amplifier in 22 nm SOI-CMOS Utilizing LDMOS. NEWCAS (2023)
Sebastian Linnhoff, Frowin Buballa, Julius Edler, Enne Wittenhagen, Urs Hecht, Friedel Gerfers
A 10Bit 6 GS/s Time-Interleaved SAR ADC with a Single Full-Rate Front-End Track-and-Hold. NEWCAS (2023)
Enne Wittenhagen, Patrick Kurth, Tobias Kaiser, Friedel Gerfers
A TI 12 GS/s Sampled Beam-Forming Receiver for a $2\times 2$ Antenna-Array with 69 dBc SFDR. ICECS 2022 (2022)
Patrick J. Artz, Friedel Gerfers
6G D-Band Receiver Model with High Spectral Efficiency Enabling Global System Optimization. MWSCAS (2022)
Akif Omer Ucar, Friedel Gerfers
Sturdy-MASH Delta-Sigma Modulator with Improved Resolution Using Noise-coupling Multi-bit Quantizer. MWSCAS (2022)
Jamila Josip Borda, Kirsten Matheus, Friedel Gerfers
Characterization of Multi-Gigabit Automotive Ethernet Channel Radiated Emissions in Relation to ECU PCB Shield-Ground Implementations. ETFA (2022)
Tobias Kaiser, Friedel Gerfers
Pasithea-1: An Energy-Efficient Self-contained CGRA with RISC-Like ISA. ARCS (2022)
Jamila Josip Borda, Kirsten Matheus, Friedel Gerfers
Beyond 10Gbps Electrical Automotive Ethernet Channel Insertion Loss Characterization. IV (2022)
Kai Misselwitz, Marcel Runge, Friedel Gerfers
A Calibration-Free 96.7 dB SNDR 4 MS/s CT I-SD Modulator With Single Feedback DAC. ICECS 2022 (2022)
Enne Wittenhagen, Urs Hecht, Halil Cirit, Saman Behtash, Srinivas Venkataram, Friedel Gerfers
A 224 Gbit/s Transceiver Front-end Design for Next Generation Data Centers. ICECS 2022 (2022)
Helia Ordouei, Friedel Gerfers, Silvio Waldmann
In-Vehicle Network Standards - Overview and Implementation Examples. ISCAS (2022)
Urs Hecht, Enne Wittenhagen, Halil Cirit, Saman Behtash, Srinivas Venkataram, Friedel Gerfers
PAM-4/6/8 Performance and Power Analysis for Next Generation 224Gbit/s Links. ISCAS (2022)
Marcel Runge, Julius Edler, Dario Schmock, Tobias Kaiser, Friedel Gerfers
A 30-MHz BW 74.6-dB SNDR 92-dB SFDR CT ΔΣ Modulator with Active Body-Bias DAC Calibration in 22nm FDSOI CMOS. CICC (2022)
Silvio Waldmann, Helia Ordouei, Friedel Gerfers
A novel OFDM-based Radar and Communication System Design using Digital IQ-Modulation and 52 GS/s Direct-RF Data Converter. ISCAS (2022)
Patrick Kurth, Philipp Nickel, Urs Hecht, Friedel Gerfers
A Divider-less General PLL Lock Assist and Automatic Frequency Calibration System for Millimeter-Wave Sub-Sampling Phase-Locked Loops. ICECS 2022 (2022)
Suhas Shivapakash, Hardik Jain, Olaf Hellwich, Friedel Gerfers
A Power Efficiency Enhancements of a Multi-Bit Accelerator for Memory Prohibitive Deep Neural Networks. IEEE Open J. Circuits Syst. 2 (2021)
Enne Wittenhagen, Marcel Runge, Nima Lotfi, Hossein Ghafarian, Yuan Tian, Friedel Gerfers
. IEEE Trans. Circuits Syst. I Regul. Pap. 68 (1) (2021)
Frowin Buballa, Sebastian Linnhoff, Michael Reinhold, Friedel Gerfers
A 12 Bit 500 MS/s Sub-2 Radix SAR ADC for a Time-Interleaved 8 GS/s ADC in 28 nm CMOS. ISCAS (2021)
Marcel Runge, Dario Schmock, Tobias Kaiser, Friedel Gerfers
A 0.9V 45MS/s CT ΔΣ Modulator with 94dB SFDR and 25.6fJ/conv. enabled by a Digital Static and ISI Calibration in 22 FDSOI CMOS. CICC (2021)
Sebastian Linnhoff, Erik Sippel, Frowin Buballa, Michael Reinhold, Martin Vossiek, Friedel Gerfers
A 12 Bit 8 GS/s Randomly-Time-Interleaved SAR ADC with Adaptive Mismatch Correction. ISCAS (2021)
Simon Wiedemann, Suhas Shivapakash, Daniel Becking, Pablo Wiedemann, Wojciech Samek, Friedel Gerfers, Thomas Wiegand
FantastIC4: A Hardware-Software Co-Design Approach for Efficiently Running 4Bit-Compact Multilayer Perceptrons. IEEE Open J. Circuits Syst. 2 (2021)
Patrick Kurth, K. Misselwitz, Urs Hecht, Friedel Gerfers
A 56 GHz 19 fs RMS-Jitter Sub-Sampling Phase-Locked Loop for 112 Gbit/s Transceivers. ISCAS (2021)
Julius Edler, Marcel Runge, Friedel Gerfers
A Dynamic Body-Bias Linearization Technique Enabling Wide-Band GmC based Continous-Time Sigma-Delta Converters in 22 nm FD-SOI CMOS. MWSCAS (2021)
Friedel Gerfers, Ping-Hsuan Hsieh, Dejan Markovc, Jun Deguchi, Eric Karl
Introduction to the Special Issue on the 2020 IEEE International Solid-State Circuits Conference (ISSCC). IEEE J. Solid State Circuits 56 (1) (2021)
Patrick Kurth, Urs Hecht, Enne Wittenhagen, Friedel Gerfers
A Divider-less Automatic Frequency Calibration for Millimeter-Wave Sub-Sampling Phase-Locked Loops. MWSCAS (2021)
Marcel Runge, Julius Edler, Tobias Kaiser, Friedel Gerfers
A 18MS/s 76dB SNDR 93dB SFDR CT ΔΣ Modulator with Input Voltage Tracking 2nd-Order GmVC Filter and Shared FIR DAC in 22nm FDSOI CMOS. CICC (2021)
Suhas Shivapakash, Hardik Jain, Olaf Hellwich, Friedel Gerfers
A Power Efficient Multi-Bit Accelerator for Memory Prohibitive Deep Neural Networks. ISCAS (2020)
Urs Hecht, Nikolay Ledentsov Jr., Lukasz Chorchos, Patrick Kurth, Nikolay N. Ledentsov, Friedel Gerfers
Up to 30-Fold BER Improvement using a Data-Dependent FFE Switching Technique for 112Gbit/s PAM-4 VCSEL Based Links. OFC (2020)
Marcel Runge, Dario Schmock, Enne Wittenhagen, Friedel Gerfers
A DAC Linearization Technique Enabling 15-Bit INL through Adaptive Body-Biasing in 22FDX. ISCAS (2020)
Enne Wittenhagen, Marcel Runge, Wilhelm Keusgen, Friedel Gerfers
A Sub-Sampling Beam-Forming Summation Track and Hold for Software Defined Radio. ISCAS (2020)
Nikolay N. Ledentsov, V. A. Shchukin, V. P. Kalosha, Nikolay Ledentsov Jr., Lukasz Chorchos, Jaroslaw P. Turkiewicz, Urs Hecht, Patrick Kurth, Friedel Gerfers, Justin Lavrencik, Siddharth Varughese, Stephen E. Ralph
Optical Interconnects using Single-Mode and Multi-Mode VCSEL and Multi-Mode Fiber. OFC (2020)
Sebastian Linnhoff, Frowin Buballa, Michael Reinhold, Friedel Gerfers
A 12 bit 8 GS/s Time-Interleaved SAR ADC in 28nm CMOS. ICECS (2020)
Paul Hollmann, Marcel Runge, Friedel Gerfers
A 64 GBaud 6-Bit Current Steering DAC With a Binary Tree Current Summing Network. ICECS (2020)
Patrick Kurth, Kai Misselwitz, Urs Hecht, Friedel Gerfers
A Transmission-Line-based Phase Shifter for High-Speed, Ultra-Low-Power N-PSK Transmitters. ICECS (2020)
Tobias Kaiser, Friedel Gerfers
Towards pW-Class IoT Nodes using Crystalline Oxide Semiconductor Dynamic Logic. ISCAS (2020)
Simon Wiedemann, Suhas Shivapakash, Pablo Wiedemann, Daniel Becking, Wojciech Samek, Friedel Gerfers, Thomas Wiegand
FantastIC4: A Hardware-Software Co-Design Approach for Efficiently Running 4bit-Compact Multilayer Perceptrons. CoRR (2020)
Nima Lotfi, Friedel Gerfers
An UWB 18.5 GS/s Sampling Front-End for a 74 GS/s 5-bit ADC in 22nm FDSOI. NEWCAS (2019)
Friedel Gerfers, Nima Lotfi, Enne Wittenhagen, Hossein Ghafarian, Yuan Tian, Marcel Runge
Body-Bias Techniques in CMOS 22FDX® for Mixed-Signal Circuits and Systems. ICECS (2019)
Nima Lotfi, Pedro Lehmann Ibáñez, Marcel Runge, Friedel Gerfers
A Single-Channel 18.5 GS/s 5-bit Flash ADC using a Body-Biased Comparator Architecture in 22nm FD-SOI. ISCAS (2019)
Marcel Runge, Nima Lotfi, Friedel Gerfers
Optimized Zero Placement within Noise Coupling Transfer Functions for Oversampled ADCs. ISCAS (2019)
Norman Dodel, Roland Thewes, Anouar Laifi, Dirk Eberhardt, Stefan Keil, Leonhard Sturm, Armin Klumpp, Oliver Freudenberg, Friedel Gerfers, Gerhard Hartwich
A CMOS-Based Electrochemical DNA Hybridization Microarray for Diagnostic Applications with 109 Test Sites. BioCAS (2019)
Hossein Ghafarian, Helia Ordouei, Friedel Gerfers
Impedance Calibration Technique Canceling Process and Temperature Variation in Source Terminated DAC Drivers in 22nm FDSOI. MWSCAS (2019)
Andreas Mai, Philipp Scholz, Gerhard G. Fischer, Friedel Gerfers
High Performance Electronic Design Education - from Technology towards High Frequency Chip Sets. FIE (2019)
Helia Ordouei, Hossein Ghafarian, Friedel Gerfers
Analysis of Package Impedance Effects on the Linearity of Source Series Terminated DACs. MWSCAS (2018)
Marcel Runge, Friedel Gerfers
Correlation Based Time-Variant DAC Error Estimation in Continuous-Time ∑Δ ADCs With Pseudo Random Noise. ISCAS (2018)
Marcel Runge, Sebastian Linnhoff, Friedel Gerfers
A Temperature and Process Corner Insensitive Design Method for Digital Circuits in 40nm CMOS. MWSCAS (2018)
Christian Schmidt, Patrick Zielonka, Volker Jungnickel, Ronald Freund, Tobias Tannert, Markus Grozing, Manfred Berroth, Friedel Gerfers
Behavioral Model for a High-Speed 2: 1 Analog Multiplexer. MWSCAS (2018)
Nima Lotfi, Marcel Runge, Friedel Gerfers
AMDAC Common-Mode Shifting Technique enabling Power Consumption Reduction in Pipeline ADCs. MWSCAS (2018)
Marcel Runge, Dario Schmock, Philipp Scholz, Georg Böck, Friedel Gerfers
A 0.02-mm2 9-bit 100-MS/s Charge-Injection Cell Based SAR-ADC in 65-nm LP CMOS. ESSCIRC (2018)
Christian Schmidt, Christoph Kottke, Vicky H. Tanzil, Ronald Freund, Volker Jungnickel, Friedel Gerfers
Digital-to-Analog Converters Using Frequency Interleaving: Mathematical Framework and Experimental Verification. Circuits Syst. Signal Process. 37 (11) (2018)
Soenke Vehring, Yaoshun Ding, Philipp Scholz, Dominic Maurath, Friedel Gerfers, Georg Böck
High output power frequency doubler for digital PLLs in fully integrated 24 GHz CMOS radar systems. ICUWB (2017)
Hossein Ghafarian, Friedel Gerfers
Analysis and compensation technique canceling non-linear switch and package impedance effects of a 3.2GS/S TX-DAC. MWSCAS (2017)
Hossein Ghafarian, Friedel Gerfers
A digital calibration technique canceling non-linear switch and package impedance effects of a 1.6GS/s TX-DAC in 28 nm CMOS. ISCAS (2017)
Soenke Vehring, Yaoshun Ding, Dominic Maurath, Friedel Gerfers, Georg Böck
Link-budget calculations for CMOS integrated microwave receivers. EUROCON (2017)
Marcel Runge, Dario Schmock, Friedel Gerfers
Noise and non-linearity analysis of a charge-injection-cell-based 10-bit 50-MS/s SAR-ADC. MWSCAS (2017)
Stefanie Lehmann, Friedel Gerfers
Channel analysis for a 6.4 Gb/s DDR5 data buffer receiver front-end. NEWCAS (2017)
Marcel Runge, Friedel Gerfers
A digital compensation method canceling static and non-linear time-variant feedback DAC errors in ΣΔ analog-to-digital converters. ISCAS (2017)
Adel Fatemi, Heinrich Klar, Friedel Gerfers
Implementation and design investigation of 40 Gbps driver IC for silicon photonics ring-modulator in SiGe 130-nm. ISCAS (2016)
Ramin Farjad-Rad, Friedel Gerfers, Michael Brown, Ahmad Tavakoli, David Nguyen, Hossein Sedarat, Ramin Shirani, Hiok-Tiaq Ng
A 48-Port FCC-Compliant 10GBASE-T Transmitter With Mixed-Mode Adaptive Echo Canceller. IEEE J. Solid State Circuits 47 (12) (2012)
Friedel Gerfers, Ramin Farjad-Rad, Michael Brown, Ahmad Tavakoli, David Nguyen, Hiok-Tiaq Ng, Ramin Shirani
A 16-port FCC-compliant 10GBase-T transmitter and hybrid with 76dBc SFDR up to 400MHz scalable to 48 ports. ISSCC (2012)
Friedel Gerfers, Gerrit W. den Besten, Pavel V. Petkov, Jim E. Conder, Andreas J. Koellmann
A 0.2-2 Gb/s 6x OSR Receiver Using a Digitally Self-Adaptive Equalizer. IEEE J. Solid State Circuits 43 (6) (2008)
Matthias Keller, Alexander Buhmann, Friedel Gerfers, Maurits Ortmanns, Yiannos Manoli
On the Implicit Anti-Aliasing Feature of Continuous-Time Cascaded Sigma-Delta Modulators. IEEE Trans. Circuits Syst. I Regul. Pap. (12) (2007)
Pavel V. Petkov, Jim E. Conder, Friedel Gerfers
An infinite-skew tolerant delay locked loop. ISCAS (2006)
Friedel Gerfers, Maurits Ortmanns, P. Schmitz
A transistor-based clock jitter insensitive DAC architecture. ISCAS (2006)
Friedel Gerfers, Maurits Ortmanns, Yiannos Manoli
Increased jitter sensitivity in continuous- and discrete-time Sigma-Delta modulators due to finite opamp settling speed. ISCAS (3) (2005)
Maurits Ortmanns, Friedel Gerfers, Yiannos Manoli
A continuous-time ΣΔ Modulator with reduced sensitivity to clock jitter through SCR feedback. IEEE Trans. Circuits Syst. I Regul. Pap. (5) (2005)
Friedel Gerfers, Maurits Ortmanns, Yiannos Manoli
A new technique for automatic error correction in Sigma-Delta modulators. ISCAS (3) (2005)
Maurits Ortmanns, Friedel Gerfers, Yiannos Manoli
A Case Study on a 2-1-1 Cascaded Continuous-Time Sigma-Delta Modulator. IEEE Trans. Circuits Syst. I Regul. Pap. (8) (2005)
Matthias Keller, Yiannos Manoli, Friedel Gerfers
A calibration method for current steering digital to analog converters in continuous time multi-bit sigma delta modulators. ISCAS (1) (2004)
Maurits Ortmanns, Markus Kuderer, Yiannos Manoli, Friedel Gerfers
A cascaded continuous-time Sigma Delta modulator with 80 dB dynamic range. ISCAS (1) (2004)
Friedel Gerfers, Maurits Ortmanns, Yiannos Manoli
Design issues and performance limitations of a clock jitter insensitive multibit DAC architecture for high-performance low-power CT Sigma Delta modulators. ISCAS (1) (2004)
Maurits Ortmanns, Friedel Gerfers, Yiannos Manoli
Compensation of finite gain-bandwidth induced errors in continuous-time sigma-delta modulators. IEEE Trans. Circuits Syst. I Regul. Pap. (6) (2004)
Friedel Gerfers, Maurits Ortmanns, P. Schmitz, Yiannos Manoli, Kian Min Soh
A clock jitter insensitive multibit DAC architecture for high-performance low-power continuous-time ΣΔ modulators. ICECS (2003)
Maurits Ortmanns, Friedel Gerfers, Yiannos Manoli
Fundamental limits of jitter insensitivity in discrete and continuous-time sigma delta modulators. ISCAS (1) (2003)
Friedel Gerfers, Maurits Ortmanns, Yiannos Manoli
A 1 V, 12-bit wideband continuous-time ΣΔ modulator for UMTS applications. ISCAS (1) (2003)
Maurits Ortmanns, Friedel Gerfers, Yiannos Manoli
A continuous-time sigma-delta modulator with switched capacitor controlled current mode feedback. ESSCIRC (2003)
Maurits Ortmanns, Friedel Gerfers, Yiannos Manoli
Influence of finite integrator gain bandwidth on continuous-time sigma delta modulators. ISCAS (1) (2003)
Friedel Gerfers, Maurits Ortmanns, Yiannos Manoli
A 1.5-V 12-bit power-efficient continuous-time third-order ΣΔ modulator. IEEE J. Solid State Circuits 38 (8) (2003)
Maurits Ortmanns, Friedel Gerfers, Yiannos Manoli
Compensation of the influence of finite gain-bandwidth on continuous-time sigma-delta modulators. ICECS (2003)
Friedel Gerfers, Kian Min Soh, Maurits Ortmanns, Yiannos Manoli
Figure of merit based design strategy for low-power continuous-time Sigma-Delta modulators. ISCAS (4) (2002)
Maurits Ortmanns, Lourans Samid, Yiannos Manoli, Friedel Gerfers
Multirate cascaded continuous time Sigma-Delta modulators. ISCAS (4) (2002)
Lourans Samid, Maurits Ortmanns, Yiannos Manoli, Friedel Gerfers
A new kind of low-power multibit third order continuous-time lowpass Sigma-Delta modulator. ISCAS (3) (2002)
Friedel Gerfers, Yiannos Manoli
A design strategy for low-voltage low-power continuous-time sigma-delta A/D converters. DATE (2001)
Maurits Ortmanns, Friedel Gerfers, Yiannos Manoli
On the synthesis of cascaded continuous-time Sigma-Delta modulators. ISCAS (5) (2001)
Maurits Ortmanns, Friedel Gerfers, Lourans Samid, Yiannos Manoli
Successful design of cascaded continuous-time ΣΔ modulators. ICECS (2001)

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Publication Activity (10 Years)

Top Topics

Top Venues

Friedel Gerfers