A 0.02-mm2 9-bit 100-MS/s Charge-Injection Cell Based SAR-ADC in 65-nm LP CMOS.
Marcel RungeDario SchmockPhilipp ScholzGeorg BöckFriedel GerfersPublished in: ESSCIRC (2018)
Keyphrases
- analog to digital converter
- synthetic aperture radar
- linear programming
- nm technology
- image sensor
- low power
- cmos technology
- random access memory
- sar images
- charge coupled devices
- high speed
- linear program
- image reconstruction
- cmos image sensor
- low cost
- rms error
- power consumption
- metal oxide
- average error
- multiple sclerosis
- single chip
- low voltage
- automatic target recognition
- optimal solution
- high resolution