A clock jitter insensitive multibit DAC architecture for high-performance low-power continuous-time ΣΔ modulators.
Friedel GerfersMaurits OrtmannsP. SchmitzYiannos ManoliKian Min SohPublished in: ICECS (2003)
Keyphrases
- low power
- power consumption
- high speed
- signal processor
- vlsi architecture
- low power consumption
- low cost
- sigma delta
- single chip
- nm technology
- cmos technology
- image sensor
- mixed signal
- real time
- power saving
- high power
- digital signal processing
- logic circuits
- wireless transmission
- vlsi circuits
- data flow
- power reduction
- cmos image sensor
- signal processing
- video sequences
- power dissipation
- design methodology