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A continuous-time ΣΔ Modulator with reduced sensitivity to clock jitter through SCR feedback.
Maurits Ortmanns
Friedel Gerfers
Yiannos Manoli
Published in:
IEEE Trans. Circuits Syst. I Regul. Pap. (2005)
Keyphrases
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sensitivity analysis
markov processes
markov chain
high speed
packet loss
delta sigma
neural network
probability distribution
dynamical systems
power consumption
high sensitivity
feedback mechanisms
gray scale
end to end delay