Qiang Zhou

Publication Activity (10 Years)

Years Active: 2004-2023
Publications (10 Years): 57

Top Venues

J. Comput. Sci. Technol.

ISCAS

Integr.

CoRR

Publications

Haoyi Wang, Qiang Zhou, Yici Cai
Static Probability Analysis Guided RTL Hardware Trojan Test Generation. ASP-DAC (2023)
Jianwang Zhai, Chen Bai, Binwu Zhu, Yici Cai, Qiang Zhou, Bei Yu
McPAT-Calib: A RISC-V BOOM Microarchitecture Power Modeling Framework. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42 (1) (2023)
Shiling Luo, Wenchao Gao, Le Huang, Qiang Zhou
A circuit protection method based on minterm perturbation. CIS (2022)
Lin Li, Yici Cai, Qiang Zhou
A survey on machine learning-based routing for VLSI physical design. Integr. 86 (2022)
Wenyan Wu, Yici Cai, Qiang Zhou
TransMarker: A Pure Vision Transformer for Facial Landmark Detection. ICPR (2022)
Rui Hao, Yici Cai, Qiang Zhou
Intelligent and kernelized placement: A survey. Integr. 86 (2022)
Qiang Zhou, Chaohui Yu, Zhibin Wang, Qi Qian, Hao Li
Instant-Teaching: An End-to-End Semi-Supervised Object Detection Framework. CVPR (2021)
Qiang Zhou, Chaohui Yu, Zhibin Wang, Qi Qian, Hao Li
Instant-Teaching: An End-to-End Semi-Supervised Object Detection Framework. CoRR (2021)
Jianwang Zhai, Chen Bai, Binwu Zhu, Yici Cai, Qiang Zhou, Bei Yu
McPAT-Calib: A Microarchitecture Power Modeling Framework for Modern CPUs. ICCAD (2021)
Haoyi Wang, Yici Cai, Qiang Zhou
A game theory approach for RTL security verification resources allocation. CCF Trans. High Perform. Comput. 3 (1) (2021)
Jing Wang, Yici Cai, Qiang Zhou
A Power Grids Electromigration Analysis with Via Array Using Current-Tracing Model. ISCAS (2021)
Wenyan Wu, Yici Cai, Qiang Zhou
SRL: Separation-and-Recombination Learning for Video Facial Landmark Detection with Limited Data. FG (2021)
Jianwang Zhai, Yici Cai, Qiang Zhou
Placement and Routing Methods Considering Shape Constraints of JTL for RSFQ Circuits. IEEE Trans. Circuits Syst. II Express Briefs 68 (5) (2021)
Qiang Zhou, Wei Chen, Weiqing Wang, Jiajie Xu, Lei Zhao
Multiple Features Driven Author Name Disambiguation. ICWS (2021)
Jing Wang, Yici Cai, Qiang Zhou
Temperature-Aware Electromigration Analysis with Current-Tracking in Power Grid Networks. J. Comput. Sci. Technol. 36 (5) (2021)
Qiang Zhou, Chaohui Yu, Chunhua Shen, Zhibin Wang, Hao Li
Object Detection Made Simpler by Eliminating Heuristic NMS. CoRR (2021)
Lin Li, Yici Cai, Qiang Zhou
An Efficient Approach for DRC Hotspot Prediction with Convolutional Neural Network. ISCAS (2021)
Zhuoqian Yang, Wentao Zhu, Wayne Wu, Chen Qian, Qiang Zhou, Bolei Zhou, Chen Change Loy
TransMoMo: Invariance-Driven Unsupervised Video Motion Retargeting. CVPR (2020)
Zhuoqian Yang, Wentao Zhu, Wayne Wu, Chen Qian, Qiang Zhou, Bolei Zhou, Chen Change Loy
TransMoMo: Invariance-Driven Unsupervised Video Motion Retargeting. CoRR (2020)
Keqiang Sun, Wayne Wu, Tinghao Liu, Shuo Yang, Quan Wang, Qiang Zhou, Zuochang Ye, Chen Qian
FAB: A Robust Facial Landmark Detection Framework for Motion-Blurred Videos. CoRR (2019)
Jianlei Yang, Xueyan Wang, Qiang Zhou, Zhaohao Wang, Hai Li, Yiran Chen, Weisheng Zhao
Exploiting Spin-Orbit Torque Devices As Reconfigurable Logic for Circuit Obfuscation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38 (1) (2019)
Keqiang Sun, Wayne Wu, Tinghao Liu, Shuo Yang, Quan Wang, Qiang Zhou, Zuochang Ye, Chen Qian
FAB: A Robust Facial Landmark Detection Framework for Motion-Blurred Videos. ICCV (2019)
Wenyan Wu, Xingzhe Wu, Yici Cai, Qiang Zhou
Deep coupling neural network for robust facial landmark detection. Comput. Graph. 82 (2019)
Haoyi Wang, Chenguang Wang, Yici Cai, Qiang Zhou
A high-level information flow tracking method for detecting information leakage. Integr. 69 (2019)
Jing Wang, Yici Cai, Ming Yan, Qiang Zhou
Composite Optimization for Electromigration Reliability and Noise in Power Grid Networks. ISCAS (2019)
Xueyan Wang, Qiang Zhou, Yici Cai, Gang Qu
Parallelizing SAT-based de-camouflaging attacks by circuit partitioning and conflict avoiding. Integr. 67 (2019)
Xueyan Wang, Qiang Zhou, Yici Cai, Gang Qu
Toward a Formal and Quantitative Evaluation Framework for Circuit Obfuscation Methods. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38 (10) (2019)
Chenguang Wang, Yici Cai, Qiang Zhou
HLIFT: A high-level information flow tracking method for detecting hardware Trojans. ASP-DAC (2018)
Xiaotao Jia, Jing Wang, Yici Cai, Qiang Zhou
Electromigration Design Rule aware Global and Detailed Routing Algorithm. ACM Great Lakes Symposium on VLSI (2018)
Wayne Wu, Chen Qian, Shuo Yang, Quan Wang, Yici Cai, Qiang Zhou
Look at Boundary: A Boundary-Aware Face Alignment Algorithm. CVPR (2018)
Xueyan Wang, Qiang Zhou, Yici Cai, Gang Qu
Spear and Shield: Evolution of Integrated Circuit Camouflaging. J. Comput. Sci. Technol. 33 (1) (2018)
Xiaotao Jia, Yici Cai, Qiang Zhou, Bei Yu
A Multicommodity Flow-Based Detailed Router With Efficient Acceleration Techniques. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37 (1) (2018)
Xueyan Wang, Qiang Zhou, Yici Cai, Gang Qu
A conflict-free approach for parallelizing SAT-based de-camouflaging attacks. ASP-DAC (2018)
Jianlei Yang, Xueyan Wang, Qiang Zhou, Zhaohao Wang, Hai Li, Yiran Chen, Weisheng Zhao
Exploiting Spin-Orbit Torque Devices as Reconfigurable Logic for Circuit Obfuscation. CoRR (2018)
Wayne Wu, Chen Qian, Shuo Yang, Quan Wang, Yici Cai, Qiang Zhou
Look at Boundary: A Boundary-Aware Face Alignment Algorithm. CoRR (2018)
Shan Jiang, Ning Xu, Xueyan Wang, Qiang Zhou
An Efficient Technique to Reverse Engineer Minterm Protection Based Camouflaged Circuit. J. Comput. Sci. Technol. 33 (5) (2018)
Chenguang Wang, Yici Cai, Haoyi Wang, Qiang Zhou
Electromagnetic equalizer: an active countermeasure against EM side-channel attack. ICCAD (2018)
Chenguang Wang, Yici Cai, Qiang Zhou, Haoyi Wang
ASAX: Automatic security assertion extraction for detecting Hardware Trojans. ASP-DAC (2018)
Jia Wei, Qiang Zhou, Yici Cai
Poet-based Poetry Generation: Controlling Personal Style with Recurrent Neural Networks. ICNC (2018)
Zihan Pang, Jiliang Zhang, Qiang Zhou, Shuqian Gong, Xu Qian, Bin Tang
Crossover Ring Oscillator PUF. ISQED (2017)
Chenguang Wang, Yici Cai, Qiang Zhou
Automatic Security Property Generation for Detecting Information-Leaking Hardware Trojans. ICCD (2017)
Chenguang Wang, Ming Yan, Yici Cai, Qiang Zhou, Jianlei Yang
Power Profile Equalizer: A Lightweight Countermeasure against Side-Channel Attack. ICCD (2017)
Xueyan Wang, Yici Cai, Qiang Zhou
Cell spreading optimization for force-directed global placers. ISCAS (2017)
Xueyan Wang, Qiang Zhou, Yici Cai, Gang Qu
An Empirical Study on Gate Camouflaging Methods Against Circuit Partition Attack. ACM Great Lakes Symposium on VLSI (2017)
Ming Yan, Yici Cai, Chenguang Wang, Qiang Zhou
An Effective Power Grid Optimization Approach for the Electromigration Reliability. ISVLSI (2017)
Xueyan Wang, Qiang Zhou, Yici Cai, Gang Qu
Is the Secure IC camouflaging really secure? ISCAS (2016)
Xueyan Wang, Xiaotao Jia, Qiang Zhou, Yici Cai, Jianlei Yang, Mingze Gao, Gang Qu
Secure and Low-Overhead Circuit Obfuscation Technique with Multiplexers. ACM Great Lakes Symposium on VLSI (2016)
Jiliang Zhang, Qiang Wu, Yipeng Ding, Yong-Qiang Lv, Qiang Zhou, Zhihua Xia, Xingming Sun, Xing-Wei Wang
Techniques for Design and Implementation of an FPGA-Specific Physical Unclonable Function. J. Comput. Sci. Technol. 31 (1) (2016)
Zhuwei Chen, Yici Cai, Qiang Zhou, Gang Qu
An efficient framework for configurable RO PUF. ISCAS (2016)
Xiaotao Jia, Yici Cai, Qiang Zhou, Bei Yu
MCFRoute 2.0: A Redundant Via Insertion Enhanced Concurrent Detailed Router. ACM Great Lakes Symposium on VLSI (2016)
Mingze Gao, Khai Lai, Jiliang Zhang, Gang Qu, Aijiao Cui, Qiang Zhou
Reliable and Anti-cloning PUFs Based on Configurable Ring Oscillators. CAD/Graphics (2015)
Chao Deng, Yici Cai, Qiang Zhou
Register Clustering Methodology for Low Power Clock Tree Synthesis. J. Comput. Sci. Technol. 30 (2) (2015)
Chao Deng, Yici Cai, Qiang Zhou
Fast synthesis of low power clock trees based on register clustering. ISQED (2015)
Hailong Yao, Fan Yang, Yici Cai, Qiang Zhou, Chiu-Wing Sham
SIAR: Customized real-time interactive router for analog circuits. Integr. 48 (2015)
Jianlei Yang, Yici Cai, Qiang Zhou, Wei Zhao
A Selected Inversion Approach for Locality Driven Vectorless Power Grid Verification. IEEE Trans. Very Large Scale Integr. Syst. 23 (11) (2015)
Yici Cai, Chao Deng, Qiang Zhou, Hailong Yao, Feifei Niu, Cliff N. Sze
Obstacle-Avoiding and Slew-Constrained Clock Tree Synthesis With Efficient Buffer Insertion. IEEE Trans. Very Large Scale Integr. Syst. 23 (1) (2015)
Zhongdong Qi, Yici Cai, Qiang Zhou
Design-Rule-Aware Congestion Model with Explicit Modeling of Vias and Local Pin Access Paths. J. Comput. Sci. Technol. 30 (3) (2015)
Jianlei Yang, Chenguang Wang, Yici Cai, Qiang Zhou
Power supply noise aware evaluation framework for side channel attacks and countermeasures. FPT (2014)
Chao Deng, Yici Cai, Qiang Zhou
A register clustering algorithm for low power clock tree synthesis. ISCAS (2014)
Yong-Qiang Lv, Qiang Zhou, Yici Cai, Gang Qu
Trusted Integrated Circuits: The Problem and Challenges. J. Comput. Sci. Technol. 29 (5) (2014)
Xiaotao Jia, Yici Cai, Qiang Zhou, Gang Chen, Zhuoyuan Li, Zuowei Li
MCFRoute: a detailed router based on multi-commodity flow method. ICCAD (2014)
Jiliang Zhang, Gang Qu, Yong-Qiang Lv, Qiang Zhou
A Survey on Silicon PUFs and Recent Advances in Ring Oscillator PUFs. J. Comput. Sci. Technol. 29 (4) (2014)
Hailong Yao, Qiang Gao, Yici Cai, Qiang Zhou, Chiu-Wing Sham
Length matching in detailed routing for analog and mixed signal circuits. Microelectron. J. 45 (6) (2014)
Jianlei Yang, Yici Cai, Qiang Zhou, Jin Shi
Friendly Fast Poisson Solver Preconditioning Technique for Power Grid Analysis. IEEE Trans. Very Large Scale Integr. Syst. 22 (4) (2014)
Zhongdong Qi, Yici Cai, Qiang Zhou, Zhuoyuan Li, Mike Chen
VFGR: A very fast parallel global router with accurate congestion modeling. ASP-DAC (2014)
Zhongdong Qi, Yici Cai, Qiang Zhou
Accurate prediction of detailed routing congestion using supervised data learning. ICCD (2014)
Jianlei Yang, Zuowei Li, Yici Cai, Qiang Zhou
PowerRush: An Efficient Simulator for Static Power Grid Analysis. IEEE Trans. Very Large Scale Integr. Syst. 22 (10) (2014)
Ziyang Qi, Kun Ma, Qiang Zhou, Yici Cai
RSMT construction algorithm based on Congestion-Oriented Flexibility. LASCAS (2014)
Jiliang Zhang, Yaping Lin, Yongqiang Lu, Ray C. C. Cheung, Wenjie Che, Qiang Zhou, Jinian Bian
Binding Hardware IPs to Specific FPGA Device via Inter-twining the PUF Response with the FSM of Sequential Circuits. FCCM (2013)
Zhongdong Qi, Yici Cai, Qiang Zhou
Bridging the Gap between Global Routing and Detailed Routing: A Practical Congestion Model. CAD/Graphics (2013)
Chi-En Daniel Yin, Gang Qu, Qiang Zhou
Design and implementation of a group-based RO PUF. DATE (2013)
Jiliang Zhang, Qiang Wu, Yongqiang Lyu, Qiang Zhou, Yici Cai, Yaping Lin, Gang Qu
Design and Implementation of a Delay-Based PUF for FPGA IP Protection. CAD/Graphics (2013)
Jianlei Yang, Yici Cai, Qiang Zhou, Wei Zhao
Selected inversion for vectorless power grid verification by exploiting locality. ICCD (2013)
Jiliang Zhang, Yaping Lin, Yongqiang Lyu, Gang Qu, Ray C. C. Cheung, Wenjie Che, Qiang Zhou, Jinian Bian
FPGA IP protection by binding Finite State Machine to Physical Unclonable Function. FPL (2013)
Zuowei Li, Yuchun Ma, Qiang Zhou, Yici Cai, Yuan Xie, Tingting Huang
Thermal-aware P/G TSV planning for IR drop reduction in 3D ICs. Integr. 46 (1) (2013)
Jinming Zhao, Hailong Yao, Yici Cai, Qiang Zhou
A new splitting graph construction algorithm for SIAR router. ASICON (2013)
Weijie Chen, Hailong Yao, Yici Cai, Qiang Zhou
Analog routing considering min-area constraint. ASICON (2013)
Wenchao Gao, Qiang Zhou, Xu Qian, Yici Cai
A DyadicCluster method used for nonlinear placement. ISQED (2012)
Zuowei Li, Yuchun Ma, Qiang Zhou, Yici Cai, Yu Wang, Tingting Huang, Yuan Xie
Thermal-aware power network design for IR drop reduction in 3D ICs. ASP-DAC (2012)
Jiliang Zhang, Yongqiang Lu, Qiang Zhou, Qiang Wu, Yaping Lin, Kang Zhao
TimFastPlace: Critical-path based timing driven FastPlace. IEICE Electron. Express 9 (16) (2012)
Jianlei Yang, Zuowei Li, Yici Cai, Qiang Zhou
PowerRush : Efficient transient simulation for power grid analysis. ICCAD (2012)
Zhongdong Qi, Qiang Zhou, Yanming Jia, Yici Cai, Zhuoyuan Li, Hailong Yao
A novel fine-grain track routing approach for routability and crosstalk optimization. ISQED (2011)
Qiang Gao, Hailong Yao, Qiang Zhou, Yici Cai
A novel detailed routing algorithm with exact matching constraint for analog and mixed signal circuits. ISQED (2011)
Jianlei Yang, Yici Cai, Qiang Zhou, Jin Shi
Fast poisson solver preconditioned method for robust power grid analysis. ICCAD (2011)
Jianlei Yang, Zuowei Li, Yici Cai, Qiang Zhou
PowerRush: A linear simulator for power grid. ICCAD (2011)
Fan Yang, Hailong Yao, Qiang Zhou, Yici Cai
SIAR: splitting-graph-based interactive analog router. ACM Great Lakes Symposium on VLSI (2011)
Limin Zhu, Jinian Bian, Qiang Zhou, Yici Cai
A fast recursive detailed routing algorithm for hierarchical FPGAs. CSCWD (2011)
Liu Liu, Yongqiang Lu, Qiang Zhou
A timing-perspective study on the wire model in placement. ASICON (2011)
Qiang Zhou, Jin Shi, Bin Liu, Yici Cai
Floorplanning Considering IR Drop in Multiple Supply Voltages Island Designs. IEEE Trans. Very Large Scale Integr. Syst. 19 (4) (2011)
Feifei Niu, Qiang Zhou, Hailong Yao, Yici Cai, Jianlei Yang, Chin Ngai Sze
Obstacle-avoiding and slew-constrained buffered clock tree synthesis for skew optimization. ACM Great Lakes Symposium on VLSI (2011)
Shuzhe Zhou, Hailong Yao, Qiang Zhou, Yici Cai
Minimization of Circuit Delay and Power through Gate Sizing and Threshold Voltage Assignment. ISVLSI (2011)
Yuchun Ma, Qiang Zhou, Pingqiang Zhou, Xianlong Hong
Thermal Impacts of Leakage Power in 2D/3D floorplanning. J. Circuits Syst. Comput. 19 (7) (2010)
Junbo Yu, Qiang Zhou, Gang Qu, Jinian Bian
Behavioral level dual-vth design for reduced leakage power with thermal awareness. DATE (2010)
Weixiang Shen, Yici Cai, Wei Chen, Yongqiang Lu, Qiang Zhou, Jiang Hu
Useful clock skew optimization under a multi-corner multi-mode design framework. ISQED (2010)
Hui Dai, Qiang Zhou, Jinian Bian
Multilevel Optimization for Large-Scale Hierarchical FPGA Placement. J. Comput. Sci. Technol. 25 (5) (2010)
Dawei Liu, Qiang Zhou, Yongqiang Lu, Jinian Bian
A low power clock network placement framework. ISQED (2010)
Fan Yang, Yici Cai, Qiang Zhou, Jiang Hu
SAT based multi-net rip-up-and-reroute for manufacturing hotspot removal. DATE (2010)
Yin Shen, Qiang Zhou, Yici Cai, Xianlong Hong
ECP- and CMP-Aware Detailed Routing Algorithm for DFM. IEEE Trans. Very Large Scale Integr. Syst. 18 (1) (2010)
Limin Zhu, Qiang Zhou, Yici Cai, Jinian Bian
An architecture-aware routing optimization via satisfiabilty for hierarchical FPGA. CSCWD (2010)
Junjun Gu, Gang Qu, Lin Yuan, Qiang Zhou
Peak current reduction by simultaneous state replication and re-encoding. ICCAD (2010)

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Publication Activity (10 Years)

Top Topics

Top Venues

Qiang Zhou