Fast synthesis of low power clock trees based on register clustering.
Chao DengYici CaiQiang ZhouPublished in: ISQED (2015)
Keyphrases
- low power
- power consumption
- high speed
- low cost
- single chip
- high power
- clustering algorithm
- k means
- vlsi circuits
- wireless transmission
- low power consumption
- cmos technology
- digital signal processing
- power saving
- logic circuits
- gate array
- vlsi architecture
- mixed signal
- ultra low power
- real time
- hardware and software
- information theoretic
- general purpose