Jayashree Saxena

Publication Activity (10 Years)

Years Active: 1992-2009
Publications (10 Years): 0

Publications

Kenneth M. Butler, John M. Carulli Jr., Jayashree Saxena, Amit Nahar, W. Robert Daasch
Multidimensional Test Escape Rate Modeling. IEEE Des. Test Comput. 26 (5) (2009)
Kenneth M. Butler, John M. Carulli Jr., Jayashree Saxena
Modeling Test Escape Rate as a Function of Multiple Coverages. ITC (2008)
Srivaths Ravi, Rubin A. Parekhji, Jayashree Saxena
Low Power Test for Nanometer System-on-Chips (SoCs). J. Low Power Electron. 4 (1) (2008)
Kenneth M. Butler, Jayashree Saxena, Tony Fryars, Graham Hetherington
Minimizing Power Consumption in Scan Testing: Pattern Generation and DFT Techniques. ITC (2004)
Jayashree Saxena, Kenneth M. Butler, Vinay B. Jayaram, Subhendu Kundu, N. V. Arvind, Pravin Sreeprakash, Manfred Hachinger
A Case Study of IR-Drop in Structured At-Speed Testing. ITC (2003)
Jayashree Saxena, Kenneth M. Butler, John Gatt, R. Raghuraman, Sudheendra Phani Kumar, Supatra Basu, David J. Campbell, John Berech
Scan-Based Transition Fault Testing - Implementation and Low Cost Test Challenges . ITC (2002)
Jayashree Saxena, Kenneth M. Butler, Lee Whetsel
An analysis of power reduction techniques in scan testing. ITC (2001)
Jayashree Saxena, Kenneth M. Butler
An empirical study on the effects of test type ordering on overall test efficiency. ITC (2000)
Zoran Stanojevic, Hari Balachandran, D. M. H. Walker, Fred Lakbani, Jayashree Saxena, Kenneth M. Butler
Computer-aided fault to defect mapping (CAFDM) for defect diagnosis. ITC (2000)
Jayashree Saxena
IC diagnosis: preventing wars and war stories. ITC (1998)
Jayashree Saxena, Kenneth M. Butler, Hari Balachandran, David B. Lavo, Tracy Larrabee, F. Joel Ferguson, Brian Chess
On applying non-classical defect models to automated diagnosis. ITC (1998)
David B. Lavo, Tracy Larrabee, F. Joel Ferguson, Brian Chess, Jayashree Saxena, Kenneth M. Butler
Bridging Fault Diagnosis in the Absence of Physical Information. ITC (1997)
Kenneth M. Butler, Karl Johnson, Jeff Platt, Anjali Kinra, Jayashree Saxena
Automated Diagnosis in Testing and Failure Analysis. IEEE Des. Test Comput. 14 (3) (1997)
Kenneth M. Butler, Karl Johnson, Jeff Platt, Anjali Jones, Jayashree Saxena
Integrating Automated Diagnosis into the Testing and Failure Analysis Operations. ITC (1996)
Dhiraj K. Pradhan, Jayashree Saxena
A novel scheme to reduce test application time in circuits with full scan. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 14 (12) (1995)
Jayashree Saxena, Dhiraj K. Pradhan
Desgin for Testability of Asynchronous Sequential Circuits. ICCD (1993)
Jayashree Saxena, Dhiraj K. Pradhan
A Method to Derive Compact Test Sets for Path Delay Faults in Combinational Circuits. ITC (1993)
Dhiraj K. Pradhan, Jayashree Saxena
A design for testability scheme to reduce test application time in full scan. VTS (1992)