Low Power Test for Nanometer System-on-Chips (SoCs).
Srivaths RaviRubin A. ParekhjiJayashree SaxenaPublished in: J. Low Power Electron. (2008)
Keyphrases
- low power
- high speed
- power consumption
- low cost
- single chip
- wireless transmission
- high power
- low power consumption
- logic circuits
- vlsi circuits
- real time
- vlsi architecture
- cmos technology
- digital signal processing
- mixed signal
- gate array
- power reduction
- integrated circuit
- computer simulation
- signal processor
- delay insensitive