Andreia Cathelin

ORCID

Publication Activity (10 Years)

Years Active: 1998-2024
Publications (10 Years): 86

Top Venues

IEEE J. Solid State Circuits

NEWCAS

ISSCC

ESSCIRC

Publications

Lili Chen, Morteza Tavakoli Taba, Zainulabideen J. Khalifa, Andreia Cathelin, Ehsan Afshari
A Fast Back-to-Lock DPLL-Based 192-210-GHz Chirp Generator With +5.9-dBm Peak Output Power for Sub-THz Imaging and Sensing. IEEE J. Solid State Circuits 59 (5) (2024)
Julien Poupon, Manuel J. Barragán, Andreia Cathelin, Sylvain Bourdel
Dynamic Analysis of RF CMOS Inverter-Based Ring Oscillators using an All-Region MOSFET Charge-Based Model in 28nm FD-SOI CMOS. ISCAS (2024)
Lili Chen, Andreia Cathelin, Ehsan Afshari
A High-Efficiency High-Power 170-176-GHz Frequency Stabilized Quadrature Radiator. IEEE J. Solid State Circuits 59 (1) (2024)
S. M. Hossein Naghavi, Morteza Tavakoli Taba, Amirata Tabatabavakili, Ali Mostajeran, Mohammed Aseeri, Andreia Cathelin, Ehsan Afshari
24.4 Sub-THz Ruler: Spectral Bistability in a 235GHz Self-Injection-Locked Oscillator for Agile and Unambiguous Ranging. ISSCC (2024)
Deni Germano Alves Neto, Mohamed Khalil Bouchoucha, Gabriel Maranhão, Manuel J. Barragán, Márcio Cherem Schneider, Andreia Cathelin, Sylvain Bourdel, Carlos Galup-Montoro
Design-Oriented Single-Piece 5-DC-Parameter MOSFET Model. IEEE Access 12 (2024)
Soufiane Mourrane, Benoit Larras, Sylvain Clerc, Andreia Cathelin, Antoine Frappé
A 291nW Real-Time Event-Driven Spectrogram Extraction unit in 28nm FD-SOI CMOS for Keyword Spotting Application. ESSCIRC (2023)
Soufiane Mourrane, Benoit Larras, Sylvain Clerc, Andreia Cathelin, Antoine Frappé
Low-Power Event-Driven Spectrogram Extractor for Multiple Keyword Spotting: A proof of concept. NEWCAS (2023)
Mohamed Khalil Bouchoucha, Manuel J. Barragán, Andreia Cathelin, Sylvain Bourdel
A wideband sub-6GHz continuously tunable gm-boosted CG Low Noise Amplifier in 28 nm FD-SOI CMOS technology. ESSCIRC (2023)
Mohamed Khalil Bouchoucha, Dayana A. Pino-Monroy, Patrick Scheer, Philippe Cathelin, Jean-Michel Fournier, Manuel J. Barragán, Andreia Cathelin, Sylvain Bourdel
Resistive Feedback LNA design using a 7-parameter design-oriented model for advanced technologies. ISCAS (2023)
Morteza Tavakoli Taba, S. M. Hossein Naghavi, Morteza Fayazi, Ali Sadeghi, Andreia Cathelin, Ehsan Afshari
A Compact CMOS 363 GHz Autodyne FMCW Radar with 57 GHz Bandwidth for Dental Imaging. CICC (2023)
Youssef Bendou, Martin Rack, Dimitri Lederer, Andreia Cathelin, Jean-Pierre Raskin
Substrate noise mitigation using high resistivity base silicon wafer for a 14 GHz VCO on 28 nm FD-SOI. NEWCAS (2023)
Denis Flores, Dominique Dallet, Andrei Vladimirescu, Andreia Cathelin, Yann Deval
High-Resolution Fractional Digital Frequency Divider using a Binary-Rate Multiplier. NEWCAS (2023)
Mohamed Khalil Bouchoucha, Mathieu Coustans, Manuel J. Barragán, Andreia Cathelin, Sylvain Bourdel
Performance benchmark of State-of-the-art Sub-6-GHz wideband LNAs Based on an Extensive Survey. ISCAS (2023)
Bahareh Hadidian, Farzad Khoeini, S. M. Hossein Naghavi, Andreia Cathelin, Kamal Sarabandi, Ehsan Afshari
A 194-238GHz Fully On-Chip Self-Referenced Frequency Stabilized Radiator for High Range Resolution Imaging. CICC (2023)
Dayana A. Pino-Monroy, Patrick Scheer, Mohamed Khalil Bouchoucha, Carlos Galup-Montoro, Manuel J. Barragan, Jean-Michel Fournier, Andreia Cathelin, Sylvain Bourdel
Design-oriented model for short-channel MOS transistors based on inversion charge. LASCAS (2023)
Dayana A. Pino-Monroy, Patrick Scheer, Mohamed Khalil Bouchoucha, Carlos Galup-Montoro, Manuel J. Barragan, Philippe Cathelin, Jean-Michel Fournier, Andreia Cathelin, Sylvain Bourdel
Corrections to "Design-Oriented All-Regime All-Region 7-Parameter Short-Channel MOSFET Model Based on Inversion Charge". IEEE Access 11 (2023)
Morteza Tavakoli Taba, S. M. Hossein Naghavi, Sara Shoouri, Andreia Cathelin, Ehsan Afshari
A 53-62 GHz Two-channel Differential 6-bit Active Phase Shifter in 55-nm SiGe Technology. ESSCIRC (2023)
Andres Asprilla, Andreia Cathelin, Yann Deval
0.45-mW 2.35-3.0 GHz Multiplying DLL with Calibration Loop in 28nm CMOS FD-SOI. ESSCIRC (2023)
N. Grossier, Fabio Disegni, A. Ventre, A. Barcella, R. Mariani, V. Marino, S. Mazzara, A. Scavuzzo, M. Bansal, B. Soni, A. Anand, S. Banzal, D. Joshi, R. Narwal, M. Niranjani, K. Trivedi, P. Ferreira, Rossella Ranica, L. Vullo, Andreia Cathelin, Alfonso Maurelli, S. Pezzini, M. Peri
ASIL-D automotive-grade microcontroller in 28nm FD-SOI with full-OTA capable 21MB embedded PCM memory and highly scalable power management. VLSI Technology and Circuits (2023)
Lili Chen, Morteza Taba, Andreia Cathelin, Ehsan Afshari
A Low-Power 20Gb/s 196GHz BPSK Wireless Transmitter with Energy Efficiency FoM of 0.15pJ/bit/cm. CICC (2023)
Deni Germano Alves Neto, Cristina Missel Adotnes, Gabriel Maranhão, Mohamed Khalil Bouchoucha, Manuel J. Barragán, Andreia Cathelin, Márcio Cherem Schneider, Sylvain Bourdel, Carlos Galup-Montoro
A 5-DC-parameter MOSFET model for circuit simulation in QucsStudio and SPECTRE. NEWCAS (2023)
Christopher Sutardja, Ajay Singhvi, Aidan Fitzpatrick, Andreia Cathelin, Amin Arbabian
Multi-Watt-Level 4.9-GHz Silicon Power Amplifier for Portable Thermoacoustic Imaging. IEEE J. Solid State Circuits 57 (5) (2022)
Dayana A. Pino-Monroy, Patrick Scheer, Mohamed Khalil Bouchoucha, Carlos Galup-Montoro, Manuel J. Barragan, Philippe Cathelin, Jean-Michel Fournier, Andreia Cathelin, Sylvain Bourdel
Design-Oriented All-Regime All-Region 7-Parameter Short-Channel MOSFET Model Based on Inversion Charge. IEEE Access 10 (2022)
G. Diverrez, Eric Kerhervé, Andreia Cathelin
A 24-31GHz 28nm FD-SOI CMOS Power Amplifier Supporting 5G NR FR2 64-QAM Signals. ICECS 2022 (2022)
Emilio Calvanese Strinati, Michaël Peeters, Cesar Roda Neve, Manil Dev Gomony, Andreia Cathelin, Mauro Renato Boldi, Mark Ingels, Aritra Banerjee, Pascal Chevalier, Bartek Kozicki, Didier Belot
The Hardware Foundation of 6G: The NEW-6G Approach. EuCNC (2022)
Andres Asprilla, Andreia Cathelin, Yann Deval
Highly Linear Large Signal Compact Voltage-to-Current Converter in 28 nm FD-SOI Technology. LASCAS (2022)
Guillaume Tochou, Robin Benarrouch, David Gaidioz, Andreia Cathelin, Antoine Frappé, Andreas Kaiser, Jan M. Rabaey
A Sub-100-μW 0.1-to-27-Mb/s Pulse-Based Digital Transmitter for the Human Intranet in 28-nm FD-SOI CMOS. IEEE J. Solid State Circuits 57 (5) (2022)
Guillaume Tochou, Andreia Cathelin, Antoine Frappé, Andreas Kaiser, Jan M. Rabaey
Impact of Forward Body-Biasing on Ultra-Low Voltage Switched-Capacitor RF Power Amplifier in 28 nm FD-SOI. IEEE Trans. Circuits Syst. II Express Briefs 69 (1) (2022)
Bahareh Hadidian, Farzad Khoeini, S. M. Hossein Naghavi, Andreia Cathelin, Ehsan Afshari
A 220-GHz Energy-Efficient High-Data-Rate Wireless ASK Transmitter Array. IEEE J. Solid State Circuits 57 (6) (2022)
Joël Hartmann, Paolo Cappelletti, Nitin Chawla, Franck Arnaud, Andreia Cathelin
Artificial Intelligence: Why moving it to the Edge? ESSDERC (2021)
Soufiane Mourrane, Benoit Larras, Andreia Cathelin, Antoine Frappé
Event-Driven Continuous-Time Feature Extraction for Ultra Low-Power Audio Keyword Spotting. AICAS (2021)
Mohammadreza Dolatpoor Lakeh, Jean-Baptiste Kammerer, Enagnon Aguénounon, Dylan Issartel, Jean-Baptiste Schell, Sven Rink, Andreia Cathelin, Francis Calmon, Wilfried Uhring
An Ultrafast Active Quenching Active Reset Circuit with 50% SPAD Afterpulsing Reduction in a 28 nm FD-SOI CMOS Technology Using Body Biasing Technique. Sensors 21 (12) (2021)
F. Disegni, A. Ventre, A. Molgora, Paolo Cappelletti, R. Badalamenti, P. Ferreira, G. Castagna, Andreia Cathelin, Anna Gandolfo, Andrea Redaelli, D. Manfrè, Alfonso Maurelli, C. Torti, F. Piazza, M. Carfì, Franck Arnaud, M. Perroni, M. Caruso, S. Pezzini, R. Annunziata, G. Piazza, Olivier Weber, M. Peri
16MB High Density Embedded PCM macrocell for automotive-grade microcontroller in 28nm FD-SOI, featuring extension to 24MB for Over-The-Air software update. VLSI Circuits (2021)
Edoardo Charbon, Alicia Klinefelter, Massimo Alioto, Yao-Hong Liu, Munehiko Nagatani, Arijit Raychowdhury, Andreia Cathelin, Boris Murmann
F4: Electronics for a Quantum World. ISSCC (2021)
Romane Dumont, Magali De Matos, Andreia Cathelin, Yann Deval
A Low-Noise mm-Wave Injection-Locked Oscillator designed in 65nm Partially Depleted SOI CMOS Technology. NEWCAS (2021)
Joël Hartmann, Paolo Cappelletti, Nitin Chawla, Franck Arnaud, Andreia Cathelin
Artificial Intelligence: Why moving it to the Edge? ESSCIRC (2021)
Naftali Weiss, Gregory Cooke, Peter Schvan, Pascal Chevalier, Andreia Cathelin, Sorin P. Voinigescu
200-GS/s ADC Front-End Employing 25% Duty Cycle Quadrature Clock Generator. ESSCIRC (2021)
Bahareh Hadidian, Farzad Khoeini, S. M. Hossein Naghavi, Andreia Cathelin, Ehsan Afshari
An Energy Efficient Fully Integrated 20Gbps OOK Wireless Transmitter at 220GHz. CICC (2021)
S. M. Hossein Naghavi, Saghar Seyedabbaszadehesfahlani, Farzad Khoeini, Andreia Cathelin, Ehsan Afshari
A 250GHz Autodyne FMCW Radar in 55nm BiCMOS with Micrometer Range Resolution. ISSCC (2021)
Nick Van Helleputte, Arijit Raychowdhury, Ping-Hsuan Hsieh, Jun Deguchi, Matteo Perenzoni, Esther Rodríguez-Villegas, Long Yan, Andreia Cathelin, Keith A. Bowman, Chris Van Hoof
F3: Silicon Technologies in the Fight Against Pandemics - From Point of Care to Computational Epidemiology. ISSCC (2021)
Mohammadreza Dolatpoor Lakeh, Jean-Baptiste Kammerer, Jean-Baptiste Schell, Dylan Issartel, Francis Calmon, Andreia Cathelin, Wilfried Uhring
An Active Quenching Circuit for a Native 3D SPAD Pixel in a 28 nm CMOS FDSOI Technology. NEWCAS (2021)
Ricardo Gomez Gomez, Edwige Bano, Andreia Cathelin, Sylvain Clerc
A Performance-Flexible Energy-Optimized Automotive-Grade Cortex-R4F SoC through Combined AVS/ABB/Bias-in-Memory-Array Closed-Loop Regulation in 28nm FD-SOI. VLSI Circuits (2020)
David Gaidioz, Magali De Matos, Andreia Cathelin, Yann Deval
Ring VCO Phase Noise Optimization by Pseudo-Differential Architecture in 28nm FD-SOI CMOS. ISCAS (2020)
Robin Benarrouch, Ali Moin, Flavien Solt, Antoine Frappé, Andreia Cathelin, Andreas Kaiser, Jan M. Rabaey
Heartbeat-Based Synchronization Scheme for the Human Intranet: Modeling and Analysis. ISCAS (2020)
Robin Benarrouch, Ali Moin, Flavien Solt, Antoine Frappé, Andreia Cathelin, Andreas Kaiser, Jan M. Rabaey
Heartbeat-Based Synchronization Scheme for the Human Intranet: Modeling and Analysis. CoRR (2020)
Flavien Solt, Robin Benarrouch, Guillaume Tochou, Olivér Facklam, Antoine Frappé, Andreia Cathelin, Andreas Kaiser, Jan M. Rabaey
Energy Efficient Heartbeat-Based MAC Protocol for WBAN Employing Body Coupled Communication. IEEE Access 8 (2020)
Tulio Chaves de Albuquerque, Dylan Issartel, Raphael Clerc, Patrick Pittet, Remy Cellier, Wilfried Uhring, Andreia Cathelin, Francis Calmon
Body-biasing considerations with SPAD FDSOI: advantages and drawbacks. ESSDERC (2019)
Robin Benarrouch, Arno Thielens, Andreia Cathelin, Antoine Frappé, Andreas Kaiser, Jan M. Rabaey
Capacitive Body-Coupled Communication in the 400-500 MHz Frequency Band. BODYNETS (2019)
Nikolaus Hammler, Andreia Cathelin, Philippe Cathelin, Boris Murmann
A Spectrum-Sensing DPD Feedback Receiver With 30× Reduction in ADC Acquisition Bandwidth and Sample Rate. IEEE Trans. Circuits Syst. I Regul. Pap. (9) (2019)
Hossein Mohammadnezhad, Huan Wang, Andreia Cathelin, Payam Heydari
A 115-135-GHz 8PSK Receiver Using Multi-Phase RF-Correlation-Based Direct-Demodulation Method. IEEE J. Solid State Circuits 54 (9) (2019)
F. Disegni, R. Annunziata, A. Molgora, G. Campardo, Paolo Cappelletti, P. Zuliani, P. Ferreira, A. Ventre, G. Castagna, Andreia Cathelin, Anna Gandolfo, F. Goller, S. Malhi, D. Manfrè, Alfonso Maurelli, C. Torti, Franck Arnaud, M. Carfì, M. Perroni, M. Caruso, S. Pezzini, G. Piazza, Olivier Weber, M. Peri
Embedded PCM macro for automotive-grade microcontroller in 28nm FD-SOI. VLSI Circuits (2019)
Hossein Mohammadnezhad, Huan Wang, Andreia Cathelin, Payam Heydari
A Single-Channel RF-to-Bits 36Gbps 8PSK RX with Direct Demodulation in RF Domain. CICC (2019)
Fikre Tsigabu Gebreyohannes, Antoine Frappé, Philippe Cathelin, Andreia Cathelin, Andreas Kaiser
All-Digital Transmitter Architecture Based on Two-Path Parallel 1-bit High Pass Filtering DACs. IEEE Trans. Circuits Syst. I Regul. Pap. (11) (2018)
Dipal Ghosh, Antoine Frappé, Christophe Loyez, Andreia Cathelin
A bidirectional short range low power and high data rate W-Band transceiver for network on chip. NEWCAS (2018)
Andreia Cathelin
FD-SOI integration solutions for analog, RF and Millimeter-wave applications. ESSDERC (2018)
Arno Thielens, Robin Benarrouch, Stijn Wielandt, Matthew G. Anderson, Ali Moin, Andreia Cathelin, Jan M. Rabaey
A Comparative Study of On-Body Radio-Frequency Links in the 420 MHz-2.4 GHz Range. Sensors 18 (12) (2018)
Chen Jiang, Mohammed Aseeri, Andreia Cathelin, Ehsan Afshari
A 301.7-to-331.8GHz source with entirely on-chip feedback loop for frequency stabilization in 0.μm BiCMOS. ISSCC (2018)
Tulio Chaves de Albuquerque, Francis Calmon, Raphael Clerc, Patrick Pittet, Younes Benhammou, Dominique Golanski, Sebastien Jouan, Denis Rideau, Andreia Cathelin
Integration of SPAD in 28nm FDSOI CMOS technology. ESSDERC (2018)
Babak Mohammadi, Oskar Andersson, Joseph Nguyen, Lorenzo Ciampolini, Andreia Cathelin, Joachim Neves Rodrigues
A 128 kb 7T SRAM Using a Single-Cycle Boosting Mechanism in 28-nm FD-SOI. IEEE Trans. Circuits Syst. I Regul. Pap. (4) (2018)
Florent Torres, Eric Kerherve, Andreia Cathelin
90° Hybrid coupler design technique for wideband and multimode mm-wave operations featuring lateral ground planes virtual expansion in 28nm FD-SOI CMOS technology. LASCAS (2018)
Andreia Cathelin
FD-SOI Integration Solutions for Analog, RF and Millimeter-Wave Applications. ESSCIRC (2018)
Ali Mostajeran, Andreia Cathelin, Ehsan Afshari
A 170-GHz Fully Integrated Single-Chip FMCW Imaging Radar with 3-D Imaging Capability. IEEE J. Solid State Circuits 52 (10) (2017)
Man-Chia Chen, Aldo Pena Perez, Sri-Rajasekhar Kothapalli, Philippe Cathelin, Andreia Cathelin, Sanjiv Sam Gambhir, Boris Murmann
27.5 A pixel-pitch-matched ultrasound receiver for 3D photoacoustic imaging with integrated delta-sigma beamformer in 28nm UTBB FDSOI. ISSCC (2017)
Hamidreza Aghasi, Andreia Cathelin, Ehsan Afshari
A 0.92-THz SiGe Power Radiator Based on a Nonlinear Theory for Harmonic Generation. IEEE J. Solid State Circuits 52 (2) (2017)
Guerric de Streel, François Stas, Thibaut Gurne, François Durant, Charlotte Frenkel, Andreia Cathelin, David Bol
SleepTalker: A ULV 802.15.4a IR-UWB Transmitter SoC in 28-nm FDSOI Achieving 14 pJ/b at 27 Mb/s With Channel Selection Based on Adaptive FBB and Digitally Programmable Pulse Shaping. IEEE J. Solid State Circuits 52 (4) (2017)
Chen Jiang, Andreia Cathelin, Ehsan Afshari
A High-Speed Efficient 220-GHz Spatial-Orthogonal ASK Transmitter in 130-nm SiGe BiCMOS. IEEE J. Solid State Circuits 52 (9) (2017)
Man-Chia Chen, Aldo Pena Perez, Sri-Rajasekhar Kothapalli, Philippe Cathelin, Andreia Cathelin, Sanjiv Sam Gambhir, Boris Murmann
A Pixel Pitch-Matched Ultrasound Receiver for 3-D Photoacoustic Imaging With Integrated Delta-Sigma Beamformer in 28-nm UTBB FD-SOI. IEEE J. Solid State Circuits 52 (11) (2017)
Andreia Cathelin
RF/analog and mixed-signal design techniques in FD-SOI technology. CICC (2017)
James Hoffman, Stefan Shopov, Pascal Chevalier, Andreia Cathelin, Peter Schvan, Sorin P. Voinigescu
55-nm SiGe BiCMOS Distributed Amplifier Topologies for Time-Interleaved 120-Gb/s Fiber-Optic Receivers and Transmitters. IEEE J. Solid State Circuits 51 (9) (2016)
Chen Jiang, Ali Mostajeran, Ruonan Han, Mohammad Emadi, Hani Sherry, Andreia Cathelin, Ehsan Afshari
A Fully Integrated 320 GHz Coherent Imaging Transceiver in 130 nm SiGe BiCMOS. IEEE J. Solid State Circuits 51 (11) (2016)
Chen Jiang, Ali Mostajeran, Ruonan Han, Mohammad Emadi, Hani Sherry, Andreia Cathelin, Ehsan Afshari
25.5 A 320GHz subharmonic-mixing coherent imager in 0.13µm SiGe BiCMOS. ISSCC (2016)
M. Causo, Simone Benatti, Antoine Frappé, Andreia Cathelin, Elisabetta Farella, Andreas Kaiser, Luca Benini, Jan M. Rabaey
Sampling modulation: An energy efficient novel feature extraction for biosignal processing. BioCAS (2016)
Stefan Shopov, Andreea Balteanu, Jürgen Hasch, Pascal Chevalier, Andreia Cathelin, Sorin P. Voinigescu
A 234-261-GHz 55-nm SiGe BiCMOS Signal Source with 5.4-7.2 dBm Output Power, 1.3% DC-to-RF Efficiency, and 1-GHz Divided-Down Output. IEEE J. Solid State Circuits 51 (9) (2016)
Ilias Sourikopoulos, Antoine Frappé, Andreia Cathelin, Laurent Clavier, Andreas Kaiser
A digital delay line with coarse/fine tuning through gate/body biasing in 28nm FDSOI. ESSCIRC (2016)
Laurent Malier, Andreia Cathelin, Giorgio Cesana, Laurent Le-Pailleur
Low power advanced digital technologies to enable Internet of Things. ESSDERC (2016)
Masato Motomura, Andreia Cathelin
Introduction to the Special Issue on the 2015 Symposium on VLSI Circuits. IEEE J. Solid State Circuits 51 (4) (2016)
Nassim Bouassida, Francois Rivet, Yann Deval, David Duperray, Andreia Cathelin
A concurrent transmitter in CMOS 28nm FDSOI technology based on Walsh sequences generator. NEWCAS (2016)
Babak Mohammadi, Oskar Andersson, Joseph Nguyen, Lorenzo Ciampolini, Andreia Cathelin, Joachim Neves Rodrigues
A 128 kb single-bitline 8.4 fJ/bit 90MHz at 0.3V 7T sense-amplifierless SRAM in 28 nm FD-SOI. ESSCIRC (2016)
Camilo Salazar, Andreia Cathelin, Andreas Kaiser, Jan M. Rabaey
A 2.4 GHz Interferer-Resilient Wake-Up Receiver Using A Dual-IF Multi-Stage N-Path Architecture. IEEE J. Solid State Circuits 51 (9) (2016)
Ruonan Han, Chen Jiang, Ali Mostajeran, Mohammad Emadi, Hamidreza Aghasi, Hani Sherry, Andreia Cathelin, Ehsan Afshari
A SiGe Terahertz Heterodyne Imaging Transmitter With 3.3 mW Radiated Power and Fully-Integrated Phase-Locked Loop. IEEE J. Solid State Circuits 50 (12) (2015)
Camilo Salazar, Andreas Kaiser, Andreia Cathelin, Jan M. Rabaey
13.5 A -97dBm-sensitivity interferer-resilient 2.4GHz wake-up receiver using dual-IF multi-N-Path architecture in 65nm CMOS. ISSCC (2015)
Pascal Urard, G. Romagnello, Andrei Banciu, J. C. Grasset, V. Heinrich, Mounir Boulemnakher, F. Todeschni, Laurent Damon, Roberto Guizzetti, L. Andre, Andreia Cathelin
A self-powered IPv6 bidirectional wireless sensor & actuator network for indoor conditions. VLSIC (2015)
Razvan-Cristian Marin, Antoine Frappé, Andreas Kaiser, Andreia Cathelin
Considerations for high-speed configurable-bandwidth time-interleaved digital delta-sigma modulators and synthesis in 28 nm UTBB FDSOI. NEWCAS (2015)
D. Danilovic, Andreia Cathelin, Andrei Vladimirescu, Borivoje Nikolic
Design considerations for low-noise transconductance amplifiers in 28nm UTBB-FDSOI. NEWCAS (2015)
Joeri Lechevallier, Remko E. Struiksma, Hani Sherry, Andreia Cathelin, Eric A. M. Klumperink, Bram Nauta
-order low-pass filter in 28nm UTBB FD-SOI with >1dBVp IIP3 over a 0.7-to-1V supply. ISSCC (2015)
Ruonan Han, Chen Jiang, Ali Mostajeran, Mohammad Emadi, Hamidreza Aghasi, Hani Sherry, Andreia Cathelin, Ehsan Afshari
25.5 A 320GHz phase-locked transmitter with 3.3mW radiated power and 22.5dBm EIRP for heterodyne THz imaging systems. ISSCC (2015)
David Jacquet, Frederic Hasbani, Philippe Flatresse, Robin Wilson, Franck Arnaud, Giorgio Cesana, Thierry Di Gilio, Christophe Lecocq, Tanmoy Roy, Amit Chhabra, Chiranjeev Grover, Olivier Minez, Jacky Uginet, Guy Durieu, Cyril Adobati, Davide Casalotto, Frederic Nyer, Patrick Menut, Andreia Cathelin, Indavong Vongsavady, Philippe Magarshack
A 3 GHz Dual Core Processor ARM Cortex TM -A9 in 28 nm UTBB FD-SOI CMOS With Ultra-Wide Voltage Range and Energy Efficiency Optimization. IEEE J. Solid State Circuits 49 (4) (2014)
Jiashu Chen, Lu Ye, Diane Titz, Fred Gianesello, Romain Pilard, Andreia Cathelin, Fabien Ferrero, Cyril Luxey, Ali M. Niknejad
A digitally modulated mm-Wave cartesian beamforming transmitter with quadrature spatial combining. ISSCC (2013)
Richard Al Hadi, Hani Sherry, Janus Grzyb, Yan Zhao, Wolfgang Forster, H. M. Keller, Andreia Cathelin, Andreas Kaiser, Ullrich R. Pfeiffer
A 1 k-Pixel Video Camera for 0.7-1.1 Terahertz Imaging Applications in 65-nm CMOS. IEEE J. Solid State Circuits 47 (12) (2012)
Fawzi Houfaf, Mathieu Egot, Andreas Kaiser, Andreia Cathelin, Bram Nauta
A 65nm CMOS 1-to-10GHz tunable continuous-time low-pass filter for high-data-rate communications. ISSCC (2012)
Philippe Magarshack, Andreia Cathelin
Gaining 10x in energy efficiency in the next decade in consumer products. VLSI-DAT (2012)
Jonathan Müller, Bruno Stefanelli, Antoine Frappé, Lu Ye, Andreia Cathelin, Ali M. Niknejad, Andreas Kaiser
A 7-Bit 18th Order 9.6 GS/s FIR Up-Sampling Filter for High Data Rate 60-GHz Wireless Transmitters. IEEE J. Solid State Circuits 47 (7) (2012)
Hani Sherry, Janus Grzyb, Yan Zhao, Richard Al Hadi, Andreia Cathelin, Andreas Kaiser, Ullrich R. Pfeiffer
A 1kpixel CMOS camera chip for 25fps real-time terahertz imaging applications. ISSCC (2012)
Benjamin Parent, Jonathan Müller, Andreas Kaiser, Andreia Cathelin
Design of 10 GHz sampling rate digital FIR filters with powers-of-two coefficients. ECCTD (2011)
Christian C. Enz, Andreia Cathelin, Maysam Ghovanloo, Stefan Heinen, Minkyu Je, David Scott
Towards personalized medicine and monitoring for healthy living. ISSCC (2011)
Mathieu Egot, Baudouin Martineau, Olivier Richard, Nathalie Rolland, Andreia Cathelin, Andreas Kaiser
A 20-23GHz Coupled Oscillators Array in 65nm CMOS for HDR 60GHz beamforming applications. ESSCIRC (2011)
Jonathan Müller, Bruno Stefanelli, Antoine Frappé, Lu Ye, Andreia Cathelin, Ali M. Niknejad, Andreas Kaiser
order 9.6 GS/s FIR filter for high data rate 60-GHz wireless communications. ESSCIRC (2011)
Ray Nguyen, Christine Raynaud, Andreia Cathelin, Boris Murmann
A 6.7-ENOB, 500-MS/s, 5.1-mW dynamic pipeline ADC in 65-nm SOI CMOS. ESSCIRC (2011)
Alexandre Siligaris, Olivier Richard, Baudouin Martineau, Christopher Mounet, Fabrice Chaix, Romain Ferragut, Cedric Dehos, Jérôme Lantéri, Laurent Dussopt, Silas D. Yamamoto, Romain Pilard, Pierre Busson, Andreia Cathelin, Didier Belot, Pierre Vincent
A 65nm CMOS fully integrated transceiver module for 60GHz wireless HD applications. ISSCC (2011)
Alexandre Siligaris, Olivier Richard, Baudouin Martineau, Christopher Mounet, Fabrice Chaix, Romain Ferragut, Cedric Dehos, Jérôme Lantéri, Laurent Dussopt, Silas D. Yamamoto, Romain Pilard, Pierre Busson, Andreia Cathelin, Didier Belot, Pierre Vincent
A 65-nm CMOS Fully Integrated Transceiver Module for 60-GHz Wireless HD Applications. IEEE J. Solid State Circuits 46 (12) (2011)

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Andreia Cathelin