An Ultrafast Active Quenching Active Reset Circuit with 50% SPAD Afterpulsing Reduction in a 28 nm FD-SOI CMOS Technology Using Body Biasing Technique.

Mohammadreza Dolatpoor LakehJean-Baptiste KammererEnagnon AguénounonDylan IssartelJean-Baptiste SchellSven RinkAndreia CathelinFrancis CalmonWilfried Uhring
Published in: Sensors (2021)
Keyphrases
  • cmos technology
  • silicon on insulator
  • low power
  • power consumption
  • spl times
  • real time
  • image processing
  • power dissipation
  • pattern recognition
  • parallel processing
  • low voltage