Substrate noise mitigation using high resistivity base silicon wafer for a 14 GHz VCO on 28 nm FD-SOI.
Youssef BendouMartin RackDimitri LedererAndreia CathelinJean-Pierre RaskinPublished in: NEWCAS (2023)
Keyphrases
- silicon on insulator
- low snr
- high speed
- signal to noise ratio
- transmission electron microscopy
- high noise
- random noise
- low signal to noise ratio
- noise level
- semiconductor devices
- low cost
- high density
- massively parallel
- missing data
- noise reduction
- integrated circuit
- noisy data
- cmos technology
- semiconductor manufacturing
- risk management
- ibm power processor