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A Low-Noise mm-Wave Injection-Locked Oscillator designed in 65nm Partially Depleted SOI CMOS Technology.
Romane Dumont
Magali De Matos
Andreia Cathelin
Yann Deval
Published in:
NEWCAS (2021)
Keyphrases
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cmos technology
silicon on insulator
low power
spl times
power consumption
low voltage
parallel processing
power dissipation
low cost
missing data
signal to noise ratio
mixed signal
clock frequency
ibm power processor
high speed