Thiago Santos Copetti

Publication Activity (10 Years)

Years Active: 2014-2024
Publications (10 Years): 11

Top Topics

Fault Detection

Computational Properties

Defeasible Logic

Defect Classification

Top Venues

J. Electron. Test.

VLSI-SoC (Selected Papers)

Publications

Thiago Santos Copetti, Moritz Fieback, Tobias Gemmeke, Said Hamdioui, Letícia Maria Veiras Bolzani Poehls
A DfT Strategy for Guaranteeing ReRAM's Quality after Manufacturing. J. Electron. Test. 40 (2) (2024)
Thiago Santos Copetti, A. Castelnuovo, Tobias Gemmeke, Letícia Maria Veiras Bolzani
Evaluating a New RRAM Manufacturing Test Strategy. LATS (2023)
Thiago Santos Copetti, M. Nilovic, Moritz Fieback, Tobias Gemmeke, Said Hamdioui, Letícia Maria Bolzani Poehls
Exploring an On-Chip Sensor to Detect Unique Faults in RRAMs. LATS (2022)
Thiago Santos Copetti, Tobias Gemmeke, Letícia Maria Veiras Bolzani
Validating a DFT Strategy's Detection Capability regarding Emerging Faults in RRAMs. VLSI-SoC (2021)
E. Brum, Moritz Fieback, Thiago Santos Copetti, H. Jiayi, Said Hamdioui, Fabian Vargas, Letícia Maria Veiras Bolzani
Evaluating the Impact of Process Variation on RRAMs. LATS (2021)
G. Cardoso Medeiros, Moritz Fieback, Thiago Santos Copetti, Anteneh Gebregiorgis, Mottaqiallah Taouil, Leticia B. Poehls, Said Hamdioui
Improving the Detection of Undefined State Faults in FinFET SRAMs. DTIS (2021)
Thiago Santos Copetti, Tobias Gemmeke, Letícia Maria Bolzani Pöhls
A DfT Strategy for Detecting Emerging Faults in RRAMs. VLSI-SoC (Selected Papers) (2021)
Thiago Santos Copetti, Tiago R. Balen, E. Brum, C. Aquistapace, Leticia Bolzani Poehls
A Comparative Study Between FinFET and CMOS-Based SRAMs under Resistive Defects. LATS (2019)
Thiago Santos Copetti, Guilherme Cardoso Medeiros, Letícia Maria Bolzani Poehls, Tiago R. Balen
Evaluating the Impact of Resistive Defects on FinFET-Based SRAMs. VLSI-SoC (Selected Papers) (2017)
Thiago Santos Copetti, Tiago R. Balen, Guilherme Cardoso Medeiros, Letícia Maria Bolzani Poehls
Analyzing the behavior of FinFET SRAMs with resistive defects. VLSI-SoC (2017)
Maksim Jenihhin, Giovanni Squillero, Thiago Santos Copetti, Valentin Tihhomirov, Sergei Kostin, Marco Gaudesi, Fabian Vargas, Jaan Raik, Matteo Sonza Reorda, Leticia Bolzani Poehls, Raimund Ubar, Guilherme Cardoso Medeiros
Identification and Rejuvenation of NBTI-Critical Logic Paths in Nanoscale Circuits. J. Electron. Test. 32 (3) (2016)
N. Palermo, Valentin Tihhomirov, Thiago Santos Copetti, Maksim Jenihhin, Jaan Raik, Sergei Kostin, Marco Gaudesi, Giovanni Squillero, Matteo Sonza Reorda, Fabian Vargas, Letícia Maria Bolzani Pöhls
Rejuvenation of nanoscale logic at NBTI-critical paths using evolutionary TPG. LATS (2015)
Sergei Kostin, Jaan Raik, Raimund Ubar, Maksim Jenihhin, Fabian Vargas, Letícia Maria Bolzani Poehls, Thiago Santos Copetti
Hierarchical identification of NBTI-critical gates in nanoscale logic. LATW (2014)