P. P. Chakrabarti

Publication Activity (10 Years)

Years Active: 1986-2019
Publications (10 Years): 5

Top Venues

CoRR

VLSI Design

ACM Trans. Design Autom. Electr. Syst.

APSEC

Publications

Surender Baswana, P. P. Chakrabarti, Yashodhan Kanoria, Utkarsh Patange, Sharat Chandran
Joint Seat Allocation 2018: An algorithmic perspective. CoRR (2019)
Anshuman Tripathi, Arnab Sarkar, P. P. Chakrabarti
Migration Aware Low Overhead ERfair Scheduler. VLSI Design (2017)
Piyoosh Purushothaman Nair, Arnab Sarkar, N. M. Harsha, Megha Gandhi, P. P. Chakrabarti, Sujoy Ghose
ERfair Scheduler with Processor Suspension for Real-Time Multiprocessor Embedded Systems. ACM Trans. Design Autom. Electr. Syst. 22 (1) (2016)
Martin Becker, Sajid Mohamed, Karsten Albers, P. P. Chakrabarti, Samarjit Chakraborty, Pallab Dasgupta, Soumyajit Dey, Ravindra Metta
Timing Analysis of Safety-Critical Automotive Software: The AUTOSAFE Tool Flow. APSEC (2015)
Sikhar Patranabis, Abhishek Chakraborty, Debdeep Mukhopadhyay, P. P. Chakrabarti
Using State Space Encoding To Counter Biased Fault Attacks on AES Countermeasures. IACR Cryptol. ePrint Arch. 2015 (2015)
Priyankar Ghosh, Amit Sharma, P. P. Chakrabarti, Pallab Dasgupta
Algorithms for Generating Ordered Solutions for Explicit AND/OR Structures. CoRR (2014)
Satya Gautam Vadlamudi, Sandip Aine, P. P. Chakrabarti
Incremental Beam search. Inf. Process. Lett. 113 (22-24) (2013)
Anshul Gupta, Aurosish Mishra, Satya Gautam Vadlamudi, P. P. Chakrabarti, Sudeshna Sarkar, Tridib Mukherjee, Nathan Gnanasambandam
A Mobility Simulation Framework Of Humans With Group Behavior Modeling. ICDM (2013)
Aritra Hazra, Priyankar Ghosh, Satya Gautam Vadlamudi, P. P. Chakrabarti, Pallab Dasgupta
Formal Methods for Early Analysis of Functional Reliability in Component-Based Embedded Applications. IEEE Embed. Syst. Lett. 5 (1) (2013)
Priyankar Ghosh, P. P. Chakrabarti, Pallab Dasgupta
Execution Ordering in AND/OR Graphs with Failure Probabilities. SOCS (2012)
Sathyam K. Pattanam, P. P. Chakrabarti, Mahesh Mahendale, Srikanth Jadcherla, Seer Akademi, Vikas Gautham, Raju Bala Showry Pudota
Panel Discussion: SoC Realization - A Bridge to New Horizons or a Bridge to Nowhere? VLSI Design (2012)
Vishal Shrivastav, Satya Gautam Vadlamudi, P. P. Chakrabarti, Dipankar Das, Purnendu Sinha
Finding Critical Components in Embedded Control Systems Sensitive to Quality-Faults. ISED (2012)
Ansuman Banerjee, Sayak Ray, Pallab Dasgupta, P. P. Chakrabarti, S. Ramesh, P. Vignesh V. Ganesan
A dynamic assertion-based verification platform for validation of UML designs. ACM SIGSOFT Softw. Eng. Notes 37 (1) (2012)
Suchismita Roy, P. P. Chakrabarti, Pallab Dasgupta
SAT based timing analysis for fixed and rise/fall gate delay models. Integr. 45 (4) (2012)
Priyankar Ghosh, Amit Sharma, P. P. Chakrabarti, Pallab Dasgupta
Algorithms for Generating Ordered Solutions for Explicit AND/OR Structures. J. Artif. Intell. Res. 44 (2012)
Pravanjan Choudhury, P. P. Chakrabarti, Rajeev Kumar
Online Scheduling of Dynamic Task Graphs with Communication and Contention for Multiprocessors. IEEE Trans. Parallel Distributed Syst. 23 (1) (2012)
Arijit Mondal, P. P. Chakrabarti, Pallab Dasgupta
Symbolic-Event-Propagation-Based Minimal Test Set Generation for Robust Path Delay Faults. ACM Trans. Design Autom. Electr. Syst. 17 (4) (2012)
Satya Gautam Vadlamudi, P. P. Chakrabarti, Dipankar Das, Purnendu Sinha
A framework for early stage quality-fault tolerance analysis of embedded control systems. DSN (2011)
Arnab Sarkar, Sujoy Ghose, P. P. Chakrabarti
A Corrigendum to: "Sticky-ERfair: a task-processor affinity aware proportional fair scheduler". Real Time Syst. 47 (4) (2011)
Arnab Sarkar, Sujoy Ghose, P. P. Chakrabarti
Sticky-ERfair: a task-processor affinity aware proportional fair scheduler. Real Time Syst. 47 (4) (2011)
Arnab Sarkar, A. Shanker, Sujoy Ghose, P. P. Chakrabarti
A Low-Overhead Partition-Oriented ERfair Scheduler for Hard Real-Time Embedded Systems. IEEE Embed. Syst. Lett. 3 (1) (2011)
Dipankar Das, P. P. Chakrabarti, Purnendu Sinha
Robust embedded software design through early analysis of quality faults. ISEC (2011)
Sandip Aine, P. P. Chakrabarti, Rajeev Kumar
Heuristic search under contract. Comput. Intell. 26 (4) (2010)
Dipankar Das, P. P. Chakrabarti, Rajeev Kumar
Thermal analysis of multiprocessor SoC applications by simulation and verification. ACM Trans. Design Autom. Electr. Syst. 15 (2) (2010)
Suchismita Roy, P. P. Chakrabarti, Pallab Dasgupta
Bounded delay timing analysis and power estimation using SAT. Microelectron. J. 41 (5) (2010)
Sandip Aine, P. P. Chakrabarti
An analysis of breadth-first beam search using uniform cost trees. ISAIM (2010)
Sandip Aine, P. P. Chakrabarti, Rajeev Kumar
Contract Search: Heuristic Search under Node Expansion Constraints. ECAI (2010)
Arnab Sarkar, P. P. Chakrabarti, Sujoy Ghose
Partition oriented frame based fair scheduler. J. Parallel Distributed Comput. 70 (7) (2010)
Arnab Sarkar, Rahul Nanda, Sujoy Ghose, P. P. Chakrabarti
Safe-ERfair. VLSI Design (2010)
Arnab Sinha, Pallab Dasgupta, Bhaskar Pal, Sayantan Das, Prasenjit Basu, P. P. Chakrabarti
Design intent coverage revisited. ACM Trans. Design Autom. Electr. Syst. 14 (1) (2009)
Sandip Aine, Rajeev Kumar, P. P. Chakrabarti
Adaptive parameter control of evolutionary algorithms to improve quality-time trade-off. Appl. Soft Comput. 9 (2) (2009)
Dipankar Das, P. P. Chakrabarti, Rajeev Kumar
Scenario-based timing verification of multiprocessor embedded applications. ACM Trans. Design Autom. Electr. Syst. 14 (3) (2009)
Pravanjan Choudhury, Rajeev Kumar, P. P. Chakrabarti
Hybrid Scheduling of Dynamic Task Graphs with Selective Duplication for Multiprocessors under Memory and Time Constraints. IEEE Trans. Parallel Distributed Syst. 19 (7) (2008)
Subrat Kumar Panda, Arnab Roy, P. P. Chakrabarti, Rajeev Kumar
Simulation-based verification using Temporally Attributed Boolean Logic. ACM Trans. Design Autom. Electr. Syst. 13 (4) (2008)
Ansuman Banerjee, Pallab Dasgupta, P. P. Chakrabarti
Auxiliary state machines + context-triggered properties in verification. ACM Trans. Design Autom. Electr. Syst. 13 (4) (2008)
Suchismita Roy, P. P. Chakrabarti, Pallab Dasgupta
Satisfiability Models for Maximum Transition Power. IEEE Trans. Very Large Scale Integr. Syst. 16 (8) (2008)
Suchismita Roy, P. P. Chakrabarti, Pallab Dasgupta
Event propagation for accurate circuit delay calculation using SAT. ACM Trans. Design Autom. Electr. Syst. 12 (3) (2007)
Tathagato Rai Dastidar, P. P. Chakrabarti
A verification system for transient response of analog circuits. ACM Trans. Design Autom. Electr. Syst. 12 (3) (2007)
Subrat Kumar Panda, Arnab Roy, P. P. Chakrabarti, Rajeev Kumar
Simulation Based Verification using Temporally Attributed Boolean Logic. VLSI Design (2007)
Bhaskar Pal, Ansuman Banerjee, Pallab Dasgupta, P. P. Chakrabarti
BUSpec: A framework for generation of verification aids for standard bus protocol specifications. Integr. 40 (3) (2007)
Arijit Mondal, P. P. Chakrabarti, Pallab Dasgupta
Timing Analysis of Sequential Circuits Using Symbolic Event Propagation. ICCTA (2007)
Pravanjan Choudhury, P. P. Chakrabarti, Rajeev Kumar
Online Dynamic Voltage Scaling using Task Graph Mapping Analysis for Multiprocessors. VLSI Design (2007)
Bhaskar Pal, Arnab Sinha, Pallab Dasgupta, P. P. Chakrabarti, Kaushik De
Hardware accelerated constrained random test generation. IET Comput. Digit. Tech. 1 (4) (2007)
Abhishek Somani, P. P. Chakrabarti, Amit Patra
An Evolutionary Algorithm-Based Approach to Automated Design of Analog and RF Circuits Using Adaptive Normalized Cost Functions. IEEE Trans. Evol. Comput. 11 (3) (2007)
Sayak Ray, Pallab Dasgupta, P. P. Chakrabarti
A New Pseudo-Boolean Satisfiability based approach to Power Mode Schedulability Analysis. VLSI Design (2007)
Dipankar Das, P. P. Chakrabarti, Rajeev Kumar
Functional verification of task partitioning for multiprocessor embedded systems. ACM Trans. Design Autom. Electr. Syst. 12 (4) (2007)
Sandip Aine, P. P. Chakrabarti, Rajeev Kumar
An Automated Meta-Level Control Framework for Optimizing the Quality-Time Tradeoff of VLSI Algorithms. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 26 (11) (2007)
Sandip Aine, P. P. Chakrabarti, Rajeev Kumar
AWA* - A Window Constrained Anytime Heuristic Search Algorithm. IJCAI (2007)
Suchismita Roy, P. P. Chakrabarti, Pallab Dasgupta
Bounded Delay Timing Analysis Using Boolean Satisfiability. VLSI Design (2007)
Arnab Sarkar, P. P. Chakrabarti, Rajeev Kumar
Frame-Based Proportional Round-Robin. IEEE Trans. Computers 55 (9) (2006)
Arijit Mondal, P. P. Chakrabarti
Reasoning about timing behavior of digital circuits using symbolic event propagation and temporal logic. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25 (9) (2006)
Samik Das, P. P. Chakrabarti, Pallab Dasgupta
Instruction-Set-Extension Exploration Using Decomposable Heuristic Search. VLSI Design (2006)
Sayantan Das, Prasenjit Basu, Pallab Dasgupta, P. P. Chakrabarti
What lies between design intent coverage and model checking? DATE (2006)
Abhishek Somani, P. P. Chakrabarti, Amit Patra
A model-based hybrid evolutionary algorithm for fast yield-inclusive design space exploration of analog circuits. ISCAS (2006)
Ansuman Banerjee, Pallab Dasgupta, P. P. Chakrabarti
Formal methods for checking realizability of coalitions in 3-party systems. MEMOCODE (2006)
Dipankar Das, Rajeev Kumar, P. P. Chakrabarti
Timing Verification of UML Activity Diagram Based Code Block Level Models for Real Time Multiprocessor System-on-Chip Applications. APSEC (2006)
Rajeev Kumar, Rahul Chaudhry, Dipankar Das, Vibha Rathi, Subrat Kumar Panda, P. P. Chakrabarti
SystemC Modeling and Validation of A RISC Processor System. FDL (2006)
Sayantan Das, Rizi Mohanty, Pallab Dasgupta, P. P. Chakrabarti
Synthesis of system verilog assertions. DATE Designers' Forum (2006)
Arnab Sarkar, P. P. Chakrabarti, Rajeev Kumar
Frame Based Fair Multiprocessor Scheduler: A Fast Fair Algorithm for Real-Time Embedded Systems. VLSI Design (2006)
Prasenjit Basu, Sayantan Das, Ansuman Banerjee, Pallab Dasgupta, P. P. Chakrabarti, Chunduri Rama Mohan, Limor Fix, Roy Armoni
Design-Intent Coverage - A New Paradigm for Formal Property Verification. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25 (10) (2006)
Diganchal Chakraborty, P. P. Chakrabarti, Arijit Mondal, Pallab Dasgupta
A Framework for Estimating Peak Power in Gate-Level Circuits. PATMOS (2006)
Sandip Aine, P. P. Chakrabarti, Rajeev Kumar
Improving the Performance of CAD Optimization Algorithms Using On-Line Meta-Level Control. VLSI Design (2006)
Abhishek Somani, P. P. Chakrabarti, Amit Patra
A Hierarchical Cost Tree Mutation Approach to Optimization of Analog Circuits. VLSI Design (2005)
Sandip Aine, Rajeev Kumar, P. P. Chakrabarti
An Adaptive Framework for Solving Multiple Hard Problems Under Time Constraints. CIS (1) (2005)
Sayantan Das, Ansuman Banerjee, Prasenjit Basu, Pallab Dasgupta, P. P. Chakrabarti, Chunduri Rama Mohan, Limor Fix
Formal Methods for Analyzing the Completeness of an Assertion Suite against a High-Level Fault Model. VLSI Design (2005)
Tathagato Rai Dastidar, P. P. Chakrabarti
A Verification System for Transient Response of Analog Circuits Using Model Checking. VLSI Design (2005)
Prasenjit Basu, Pallab Dasgupta, P. P. Chakrabarti
Syntactic Transformation of Assume-Guarantee Assertions: From Sub-Modules to Modules. VLSI Design (2005)
Tathagato Rai Dastidar, P. P. Chakrabarti, Partha Ray
A synthesis system for analog circuits based on evolutionary search and topological reuse. IEEE Trans. Evol. Comput. 9 (2) (2005)
Rajeev Kumar, Pramod Kumar Singh, P. P. Chakrabarti
Multiobjective EA Approach for Improved Quality of Solutions for Spanning Tree Problem. EMO (2005)
Rajeev Kumar, Amit Gupta, B. S. Pankaj, Mrinmoy Ghosh, P. P. Chakrabarti
Post-compilation optimization for multiple gains with pattern matching. ACM SIGPLAN Notices 40 (12) (2005)
Sandip Aine, Rajeev Kumar, P. P. Chakrabarti
Adaptive Control of Anytime Algorithm Parameters. IICAI (2005)
Arnab Roy, Subrat Kumar Panda, Rajeev Kumar, P. P. Chakrabarti
A framework for systematic validation and debugging of pipeline simulators. ACM Trans. Design Autom. Electr. Syst. 10 (3) (2005)
Dipankar Das, Rajeev Kumar, P. P. Chakrabarti
Dictionary Based Code Compression for Variable Length Instruction Encodings. VLSI Design (2005)
Prasenjit Basu, Pallab Dasgupta, P. P. Chakrabarti, Chunduri Rama Mohan
Property Refinement Techniques for Enhancing Coverage of Formal Property Verification. VLSI Design (2004)
Bhaskar Pal, Ansuman Banerjee, Pallab Dasgupta, P. P. Chakrabarti
The BUSpec platform for automated generation of verification aids for standard bus protocols. MEMOCODE (2004)
Krishnendu Chatterjee, Pallab Dasgupta, P. P. Chakrabarti
The power of first-order quantification over states in branching and linear time temporal logics. Inf. Process. Lett. 91 (5) (2004)
Sayantan Das, Prasenjit Basu, Ansuman Banerjee, Pallab Dasgupta, P. P. Chakrabarti, Chunduri Rama Mohan, Limor Fix, Roy Armoni
Formal verification coverage: computing the coverage gap between temporal specifications. ICCAD (2004)
Rajeev Kumar, Pramod Kumar Singh, P. P. Chakrabarti
Distributed Evolutionary Algorithm Search for Multiobjective Spanning Tree Problem. IWDC (2004)
Krishnendu Chatterjee, Pallab Dasgupta, P. P. Chakrabarti
Complexity of Compositional Model Checking of Computation Tree Logic on Simple Structures. IWDC (2004)
Arijit Mondal, P. P. Chakrabarti, Chittaranjan A. Mandal
A New Approach to Timing Analysis Using Event Propagation and Temporal Logic. DATE (2004)
Rajeev Kumar, Pramod Kumar Singh, P. P. Chakrabarti
Improved Quality of Solutions for Multiobjective Spanning Tree Problem Using Distributed Evolutionary Algorithm. HiPC (2004)
Rajeev Kumar, Pramod Kumar Singh, P. P. Chakrabarti
Multiobjective Genetic Search for Spanning Tree Problem. ICONIP (2004)
Ansuman Banerjee, Pallab Dasgupta, P. P. Chakrabarti
Formal Verification of Modules under Real Time Environment Constraints. VLSI Design (2004)
Prasenjit Basu, Sayantan Das, Pallab Dasgupta, P. P. Chakrabarti, Chunduri Rama Mohan, Limor Fix
Formal Verification Coverage: Are the RTL-Properties Covering the Design's Architectural Intent? DATE (2004)
Krishnendu Chatterjee, Pallab Dasgupta, P. P. Chakrabarti
A Branching Time Temporal Framework for Quantitative Reasoning. J. Autom. Reason. 30 (2) (2003)
Pallab Dasgupta, P. P. Chakrabarti, Arnab Dey, Sujoy Ghose, Wolfgang Bibel
Solving Constraint Optimization Problems from CLP-Style Specifications Using Heuristic Search Techniques. IEEE Trans. Knowl. Data Eng. 14 (2) (2002)
Bipin Rajendran, Veerbhan Kheterpal, Abhishek Das, Jayanta Majumder, Chittaranjan A. Mandal, P. P. Chakrabarti
Timing analysis of tree-like RLC circuits. ISCAS (4) (2002)
Pallab Dasgupta, Arindam Chakrabarti, P. P. Chakrabarti
Open Computation Tree Logic for Formal Verification of Modules. VLSI Design (2002)
Anindya C. Patthak, Indrajit Bhattacharya, Anirban Dasgupta, Pallab Dasgupta, P. P. Chakrabarti
Quantified Computation Tree Logic. Inf. Process. Lett. 82 (3) (2002)
Arindam Chakrabarti, Pallab Dasgupta, P. P. Chakrabarti, Ansuman Banerjee
Formal verification of module interfaces against real time specifications. DAC (2002)
S. Sriram, R. Tandon, Pallab Dasgupta, P. P. Chakrabarti
Symbolic verification of Boolean constraints over partially specified functions. ISCAS (5) (2001)
Pallab Dasgupta, P. P. Chakrabarti, Jatindra Kumar Deka, Sriram Sankaranarayanan
Min-max Computation Tree Logic. Artif. Intell. 127 (1) (2001)
Pallab Dasgupta, P. P. Chakrabarti, Amit Nandi, Sekar Krishna, Arindam Chakrabarti
Abstraction of word-level linear arithmetic functions from bit-level component descriptions. DATE (2001)
Jatindra Kumar Deka, S. Chaki, Pallab Dasgupta, P. P. Chakrabarti
Abstractions for model checking of event timings. ISCAS (5) (2001)
Chittaranjan A. Mandal, P. P. Chakrabarti, Sujoy Ghose
GABIND: a GA approach to allocation and binding for the high-level synthesis of data paths. IEEE Trans. Very Large Scale Integr. Syst. 8 (6) (2000)
S. A. Hussain, P. P. Chakrabarti, V. U. K. Sastry
Solving multiple processor and multiple resource constrained scheduling problems using a genetic algorithm approach. Int. J. Comput. Math. 75 (1) (2000)
P. P. Chakrabarti
Partial Precedence Constrained Scheduling. IEEE Trans. Computers 48 (10) (1999)
Jatindra Kumar Deka, Pallab Dasgupta, P. P. Chakrabarti
An Efficiently Checkable Subset of TCTL for Formal Verification of Transition Systems with Delays. VLSI Design (1999)
Pankaj Chauhan, Pallab Dasgupta, P. P. Chakrabarti
Exploiting Isomorphism for Compaction and Faster Simulation of Binary Decision Diagrams. VLSI Design (1999)
Chittaranjan A. Mandal, P. P. Chakrabarti, Sujoy Ghose
A design space exploration scheme for data-path synthesis. IEEE Trans. Very Large Scale Integr. Syst. 7 (3) (1999)

P. P. Chakrabarti.css-eqlu8i{font-size:small;padding-left:4px;}

Publication Activity (10 Years)

Top Topics

Top Venues

P. P. Chakrabarti