Chunduri Rama Mohan

Publication Activity (10 Years)

Years Active: 1992-2020
Publications (10 Years): 3

Top Topics

Power Management

Automated Verification

Digital Circuits

Top Venues

IEEE Trans. Very Large Scale Integr. Syst.

Publications

Sudipa Mandal, Pallab Dasgupta, Aritra Hazra, Chunduri Rama Mohan
Assertions for Protecting Mixed-Signal Latency Contracts in Power Management. IEEE Trans. Very Large Scale Integr. Syst. 28 (8) (2020)
Sudipa Mandal, Aritra Hazra, Pallab Dasgupta, Chunduri Rama Mohan
Formal Methods for Coverage Analysis of Power Management Logic with Mixed-Signal Components. VLSI Design (2018)
Sudipa Mandal, Antonio Anastasio Bruto da Costa, Aritra Hazra, Pallab Dasgupta, Bhushan Naware, Chunduri Rama Mohan, Sanjib Basu
Formal Verification of Power Management Logic with Mixed-Signal Domains. VLSI Design (2017)
Aritra Hazra, Ansuman Banerjee, Srobona Mitra, Pallab Dasgupta, Partha Pratim Chakrabarti, Chunduri Rama Mohan
Cohesive Coverage Management for Simulation and Formal Property Verification. ISVLSI (2008)
Amit Kumar, Krishnendu Chakrabarty, Chunduri Rama Mohan
An ECO Technique for Removing Crosstalk Violations in Clock Networks. VLSI Design (2007)
Prasenjit Basu, Sayantan Das, Ansuman Banerjee, Pallab Dasgupta, P. P. Chakrabarti, Chunduri Rama Mohan, Limor Fix, Roy Armoni
Design-Intent Coverage - A New Paradigm for Formal Property Verification. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25 (10) (2006)
Sayantan Das, Ansuman Banerjee, Prasenjit Basu, Pallab Dasgupta, P. P. Chakrabarti, Chunduri Rama Mohan, Limor Fix
Formal Methods for Analyzing the Completeness of an Assertion Suite against a High-Level Fault Model. VLSI Design (2005)
Prasenjit Basu, Pallab Dasgupta, P. P. Chakrabarti, Chunduri Rama Mohan
Property Refinement Techniques for Enhancing Coverage of Formal Property Verification. VLSI Design (2004)
Sayantan Das, Prasenjit Basu, Ansuman Banerjee, Pallab Dasgupta, P. P. Chakrabarti, Chunduri Rama Mohan, Limor Fix, Roy Armoni
Formal verification coverage: computing the coverage gap between temporal specifications. ICCAD (2004)
Prasenjit Basu, Sayantan Das, Pallab Dasgupta, P. P. Chakrabarti, Chunduri Rama Mohan, Limor Fix
Formal Verification Coverage: Are the RTL-Properties Covering the Design's Architectural Intent? DATE (2004)
Chunduri Rama Mohan, Srobona Mitra, Partha Pal Chaudhuri
On Incorporation of BIST for the Synthesis of Easily and Fully Testable Controllers. VLSI Design (1997)
Chunduri Rama Mohan, Partha Pratim Chakrabarti
EARTH: combined state assignment of PLA-based FSM's targeting area and testability. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 15 (7) (1996)
Chunduri Rama Mohan, Partha Pratim Chakrabarti
Combined optimization of area and testability during state assignment of PLA-based FSM's. VLSI Design (1995)
Chunduri Rama Mohan, Partha Pratim Chakrabarti
A New Approach to Synthesis of PLA-Based FSM's. VLSI Design (1994)
Chunduri Rama Mohan, Partha Pratim Chakrabarti
A new approach for factorizing FSM's. ICCAD (1994)
Chunduri Rama Mohan, Partha Pratim Chakrabarti, Sujoy Ghose
Combining State Assignment with PLA Folding. VLSI Design (1993)
Chunduri Rama Mohan, Partha Pratim Chakrabarti, Sujoy Ghose
A New algorithm for combined PLA folding. VLSI Design (1992)