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Sudipa Mandal
ORCID
Publication Activity (10 Years)
Years Active: 2017-2022
Publications (10 Years): 7
Top Topics
Low Voltage
Usage Patterns
Power Consumption
Digital Circuits
Top Venues
VLSI Design
IEEE Embed. Syst. Lett.
IEEE Trans. Very Large Scale Integr. Syst.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
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Publications
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Sudipa Mandal
,
Pallab Dasgupta
Migrating Assertions From Dense to Discrete Time.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
41 (7) (2022)
Sudipa Mandal
,
Aritra Hazra
,
Pallab Dasgupta
Usage-Driven Personalization of Power Management Logic.
IEEE Embed. Syst. Lett.
13 (3) (2021)
Sudipa Mandal
,
Krushna Gaurkar
,
Pallab Dasgupta
,
Aritra Hazra
An RL based Approach for Thermal-Aware Energy Optimized Task Scheduling in Multi-core Processors.
VLSI Design
(2021)
Sudipa Mandal
,
Pallab Dasgupta
,
Aritra Hazra
,
Chunduri Rama Mohan
Assertions for Protecting Mixed-Signal Latency Contracts in Power Management.
IEEE Trans. Very Large Scale Integr. Syst.
28 (8) (2020)
Sudipa Mandal
,
Aritra Hazra
,
Pallab Dasgupta
,
Chunduri Rama Mohan
Formal Methods for Coverage Analysis of Power Management Logic with Mixed-Signal Components.
VLSI Design
(2018)
Antonio Anastasio Bruto da Costa
,
Shriya Dharade
,
Sudipa Mandal
,
Pallab Dasgupta
AMS-Miner: Mining AMS Assertions Using Interval Arithmetic.
VLSI Design
(2018)
Sudipa Mandal
,
Antonio Anastasio Bruto da Costa
,
Aritra Hazra
,
Pallab Dasgupta
,
Bhushan Naware
,
Chunduri Rama Mohan
,
Sanjib Basu
Formal Verification of Power Management Logic with Mixed-Signal Domains.
VLSI Design
(2017)