A Verification System for Transient Response of Analog Circuits Using Model Checking.
Tathagato Rai DastidarP. P. ChakrabartiPublished in: VLSI Design (2005)
Keyphrases
- model checking
- analog circuits
- transient response
- temporal logic
- digital circuits
- automated verification
- formal verification
- model checker
- fault diagnosis
- finite state machines
- verification method
- control strategy
- control system
- temporal properties
- formal specification
- pid controller
- symbolic model checking
- concurrent systems
- computation tree logic
- control parameters
- epistemic logic
- formal methods
- model based diagnosis
- neural network
- transition systems
- bounded model checking
- pspace complete
- satisfiability problem
- linear time temporal logic
- genetic algorithm