Formal Verification of Modules under Real Time Environment Constraints.
Ansuman BanerjeePallab DasguptaP. P. ChakrabartiPublished in: VLSI Design (2004)
Keyphrases
- formal verification
- real time
- model checking
- real time embedded systems
- symbolic model checking
- model checker
- low cost
- bounded model checking
- real time systems
- control system
- high speed
- automated verification
- changing environment
- graph theory
- autonomous agents
- quality of service
- dynamic environments
- artificial intelligence