Dipankar Das

Publication Activity (10 Years)

Years Active: 2005-2021
Publications (10 Years): 25

Top Topics

Final Classification

Top Venues

Proc. VLDB Endow.

Publications

Jacob R. Stevens, Dipankar Das, Sasikanth Avancha, Bharat Kaul, Anand Raghunathan
GNNerator: A Hardware/Software Framework for Accelerating Graph Neural Networks. CoRR (2021)
Eric Qin, Geonhwa Jeong, William Won, Sheng-Chun Kao, Hyoukjun Kwon, Sudarshan Srinivasan, Dipankar Das, Gordon Euhyun Moon, Sivasankaran Rajamanickam, Tushar Krishna
Extending Sparse Tensor Accelerators to Support Multiple Compression Formats. CoRR (2021)
Jacob R. Stevens, Dipankar Das, Sasikanth Avancha, Bharat Kaul, Anand Raghunathan
GNNerator: A Hardware/Software Framework for Accelerating Graph Neural Networks. DAC (2021)
Brunno F. Goldstein, Victor da Cruz Ferreira, Sudarshan Srinivasan, Dipankar Das, Alexandre Solon Nery, Sandip Kundu, Felipe M. G. França
A Lightweight Error-Resiliency Mechanism for Deep Neural Networks. ISQED (2021)
Eric Qin, Geonhwa Jeong, William Won, Sheng-Chun Kao, Hyoukjun Kwon, Sudarshan Srinivasan, Dipankar Das, Gordon Euhyun Moon, Sivasankaran Rajamanickam, Tushar Krishna
Extending Sparse Tensor Accelerators to Support Multiple Compression Formats. IPDPS (2021)
Brunno F. Goldstein, Sudarshan Srinivasan, Dipankar Das, Kunal Banerjee, Leandro Santiago de Araújo, Victor da Cruz Ferreira, Alexandre Solon Nery, Sandip Kundu, Felipe M. G. França
Reliability Evaluation of Compressed Deep Learning Models. LASCAS (2020)
Eric Qin, Ananda Samajdar, Hyoukjun Kwon, Vineet Nadella, Sudarshan Srinivasan, Dipankar Das, Bharat Kaul, Tushar Krishna
SIGMA: A Sparse and Irregular GEMM Accelerator with Flexible Interconnects for DNN Training. HPCA (2020)
Jacob R. Stevens, Ashish Ranjan, Dipankar Das, Bharat Kaul, Anand Raghunathan
Manna: An Accelerator for Memory-Augmented Neural Networks. MICRO (2019)
Naveen Mellempudi, Sudarshan Srinivasan, Dipankar Das, Bharat Kaul
Mixed Precision Training With 8-bit Floating Point. CoRR (2019)
Abhisek Kundu, Sudarshan Srinivasan, Eric C. Qin, Dhiraj D. Kalamkar, Naveen K. Mellempudi, Dipankar Das, Kunal Banerjee, Bharat Kaul, Pradeep Dubey
K-TanH: Hardware Efficient Activations For Deep Learning. CoRR (2019)
Sudarshan Srinivasan, Pradeep Janedula, Saurabh Dhoble, Sasikanth Avancha, Dipankar Das, Naveen Mellempudi, Bharat Daga, Martin Langhammer, Gregg Baeckler, Bharat Kaul
High Performance Scalable FPGA Accelerator for Deep Neural Networks. CoRR (2019)
Ashish Ranjan, Shubham Jain, Jacob R. Stevens, Dipankar Das, Bharat Kaul, Anand Raghunathan
X-MANN: A Crossbar based Architecture for Memory Augmented Neural Networks. DAC (2019)
Dhiraj D. Kalamkar, Dheevatsa Mudigere, Naveen Mellempudi, Dipankar Das, Kunal Banerjee, Sasikanth Avancha, Dharma Teja Vooturi, Nataraj Jammalamadaka, Jianyu Huang, Hector Yuen, Jiyan Yang, Jongsoo Park, Alexander Heinecke, Evangelos Georganas, Sudarshan Srinivasan, Abhisek Kundu, Misha Smelyanskiy, Bharat Kaul, Pradeep Dubey
A Study of BFLOAT16 for Deep Learning Training. CoRR (2019)
Dipankar Das, Naveen Mellempudi, Dheevatsa Mudigere, Dhiraj D. Kalamkar, Sasikanth Avancha, Kunal Banerjee, Srinivas Sridharan, Karthik Vaidyanathan, Bharat Kaul, Evangelos Georganas, Alexander Heinecke, Pradeep Dubey, Jesús Corbal, Nikita Shustrov, Roman Dubtsov, Evarist Fomenko, Vadim O. Pirogov
Mixed Precision Training of Convolutional Neural Networks using Integer Operations. ICLR (Poster) (2018)
Dipankar Das, Naveen Mellempudi, Dheevatsa Mudigere, Dhiraj D. Kalamkar, Sasikanth Avancha, Kunal Banerjee, Srinivas Sridharan, Karthik Vaidyanathan, Bharat Kaul, Evangelos Georganas, Alexander Heinecke, Pradeep Dubey, Jesús Corbal, Nikita Shustrov, Roman Dubtsov, Evarist Fomenko, Vadim O. Pirogov
Mixed Precision Training of Convolutional Neural Networks using Integer Operations. CoRR (2018)
Srinivas Sridharan, Karthikeyan Vaidyanathan, Dhiraj D. Kalamkar, Dipankar Das, Mikhail E. Smorkalov, Mikhail Shiryaev, Dheevatsa Mudigere, Naveen Mellempudi, Sasikanth Avancha, Bharat Kaul, Pradeep Dubey
On Scale-out Deep Learning Training for Cloud and HPC. CoRR (2018)
Apoorv Vyas, Nataraj Jammalamadaka, Xia Zhu, Dipankar Das, Bharat Kaul, Theodore L. Willke
Out-of-Distribution Detection Using an Ensemble of Self Supervised Leave-out Classifiers. CoRR (2018)
Anirban Santara, Abhishek Naik, Balaraman Ravindran, Dipankar Das, Dheevatsa Mudigere, Sasikanth Avancha, Bharat Kaul
RAIL: Risk-Averse Imitation Learning. AAMAS (2018)
Apoorv Vyas, Nataraj Jammalamadaka, Xia Zhu, Dipankar Das, Bharat Kaul, Theodore L. Willke
Out-of-Distribution Detection Using an Ensemble of Self Supervised Leave-Out Classifiers. ECCV (8) (2018)
Naveen Mellempudi, Abhisek Kundu, Dipankar Das, Dheevatsa Mudigere, Bharat Kaul
Mixed Low-precision Deep Learning Inference using Dynamic Fixed Point. CoRR (2017)
Anirban Santara, Abhishek Naik, Balaraman Ravindran, Dipankar Das, Dheevatsa Mudigere, Sasikanth Avancha, Bharat Kaul
RAIL: Risk-Averse Imitation Learning. CoRR (2017)
Naveen Mellempudi, Abhisek Kundu, Dheevatsa Mudigere, Dipankar Das, Bharat Kaul, Pradeep Dubey
Ternary Neural Networks with Fine-Grained Quantization. CoRR (2017)
Swagath Venkataramani, Ashish Ranjan, Subarno Banerjee, Dipankar Das, Sasikanth Avancha, Ashok Jagannathan, Ajaya Durg, Dheemanth Nagaraj, Bharat Kaul, Pradeep Dubey, Anand Raghunathan
ScaleDeep: A Scalable Compute Architecture for Learning and Evaluating Deep Networks. ISCA (2017)
Abhisek Kundu, Kunal Banerjee, Naveen Mellempudi, Dheevatsa Mudigere, Dipankar Das, Bharat Kaul, Pradeep Dubey
Ternary Residual Networks. CoRR (2017)
Dipankar Das, Sasikanth Avancha, Dheevatsa Mudigere, Karthikeyan Vaidyanathan, Srinivas Sridharan, Dhiraj D. Kalamkar, Bharat Kaul, Pradeep Dubey
Distributed Deep Learning Using Synchronous Stochastic Gradient Descent. CoRR (2016)
Narayanan Sundaram, Nadathur Satish, Md. Mostofa Ali Patwary, Subramanya Dulloor, Michael J. Anderson, Satya Gautam Vadlamudi, Dipankar Das, Pradeep Dubey
GraphMat: High performance graph analytics made productive. Proc. VLDB Endow. 8 (11) (2015)
Md. Mostofa Ali Patwary, Nadathur Rajagopalan Satish, Narayanan Sundaram, Jongsoo Park, Michael J. Anderson, Satya Gautam Vadlamudi, Dipankar Das, Sergey G. Pudov, Vadim O. Pirogov, Pradeep Dubey
Parallel Efficient Sparse Matrix-Matrix Multiplication on Multicore Platforms. ISC (2015)
Narayanan Sundaram, Nadathur Rajagopalan Satish, Md. Mostofa Ali Patwary, Subramanya Dulloor, Satya Gautam Vadlamudi, Dipankar Das, Pradeep Dubey
GraphMat: High performance graph analytics made productive. CoRR (2015)
Karthikeyan Vaidyanathan, Dhiraj D. Kalamkar, Kiran Pamnany, Jeff R. Hammond, Pavan Balaji, Dipankar Das, Jongsoo Park, Bálint Joó
Improving concurrency and asynchrony in multithreaded MPI applications using software offloading. SC (2015)
Saptarshi Roy, Amit Patra, Partha Pratim Chakrabarti, Purnendu Sinha, Dipankar Das
Prediction Schemes for Compensating Variable Delay for Improving Performance of Real-Time Control Tasks. VLSI Design (2013)
Vishal Shrivastav, Satya Gautam Vadlamudi, P. P. Chakrabarti, Dipankar Das, Purnendu Sinha
Finding Critical Components in Embedded Control Systems Sensitive to Quality-Faults. ISED (2012)
Satya Gautam Vadlamudi, P. P. Chakrabarti, Dipankar Das, Purnendu Sinha
A framework for early stage quality-fault tolerance analysis of embedded control systems. DSN (2011)
Dipankar Das, P. P. Chakrabarti, Purnendu Sinha
Robust embedded software design through early analysis of quality faults. ISEC (2011)
Dipankar Das, P. P. Chakrabarti, Rajeev Kumar
Thermal analysis of multiprocessor SoC applications by simulation and verification. ACM Trans. Design Autom. Electr. Syst. 15 (2) (2010)
Dipankar Das, P. P. Chakrabarti, Rajeev Kumar
Scenario-based timing verification of multiprocessor embedded applications. ACM Trans. Design Autom. Electr. Syst. 14 (3) (2009)
Rajeev Kumar, Dipankar Das
Code compression for performance enhancement of variable-length embedded processors. ACM Trans. Embed. Comput. Syst. 7 (3) (2008)
Dipankar Das, P. P. Chakrabarti, Rajeev Kumar
Functional verification of task partitioning for multiprocessor embedded systems. ACM Trans. Design Autom. Electr. Syst. 12 (4) (2007)
Dipankar Das, Rajeev Kumar, P. P. Chakrabarti
Timing Verification of UML Activity Diagram Based Code Block Level Models for Real Time Multiprocessor System-on-Chip Applications. APSEC (2006)
Rajeev Kumar, Rahul Chaudhry, Dipankar Das, Vibha Rathi, Subrat Kumar Panda, P. P. Chakrabarti
SystemC Modeling and Validation of A RISC Processor System. FDL (2006)
Dipankar Das, Rajeev Kumar, P. P. Chakrabarti
Dictionary Based Code Compression for Variable Length Instruction Encodings. VLSI Design (2005)