Naifeng Jing

ORCID

Publication Activity (10 Years)

Years Active: 2009-2024
Publications (10 Years): 91

Top Venues

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.

DAC

IEEE Trans. Very Large Scale Integr. Syst.

ISCAS

Publications

Kunyue Li, Zhengji Zhao, Qixuan Cai, Qin Wang, Naifeng Jing, Zhigang Mao, Jianfei Jiang
A novel vehicle collision detection system: Integrating audio-visual fusion for enhanced performance. Expert Syst. Appl. 249 (2024)
Chen Yin, Jianfei Jiang, Qin Wang, Zhigang Mao, Naifeng Jing
SparGNN: Efficient Joint Feature-Model Sparsity Exploitation in Graph Neural Network Acceleration. ASPDAC (2024)
Zhuoran Song, Chunyu Qi, Fangxin Liu, Naifeng Jing, Xiaoyao Liang
CMC: Video Transformer Acceleration via CODEC Assisted Matrix Condensing. ASPLOS (2) (2024)
Lin Xie, Zizheng Dong, Jialei Sun, Sai Gao, Shuaipeng Li, Naifeng Jing, Qin Wang, Jianfei Jiang
A 0.8-ps RMS Precision Period Jitter Measurement Circuit with Offset Reduction. ISCAS (2024)
Zihan Zhang, Jianfei Jiang, Qin Wang, Zhigang Mao, Naifeng Jing
3A-ReRAM: Adaptive Activation Accumulation in ReRAM-Based CNN Accelerator. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43 (1) (2024)
Chen Yin, Jianfei Jiang, Qin Wang, Zhigang Mao, Naifeng Jing
DeltaGNN: Accelerating Graph Neural Networks on Dynamic Graphs With Delta Updating. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43 (4) (2024)
Yilong Zhao, Mingyu Gao, Fangxin Liu, Yiwei Hu, Zongwu Wang, Han Lin, Jin Li, He Xian, Hanlin Dong, Tao Yang, Naifeng Jing, Xiaoyao Liang, Li Jiang
UM-PIM: DRAM-based PIM with Uniform & Shared Memory Space. ISCA (2024)
Zelong Yuan, Siwei Yuan, Pengyu Liu, Chen Yin, Lei Xu, Weiguang Sheng, Naifeng Jing
A Flexible and High-Precision Activation Function Unit Based on Equi-Error Partitioning Algorithm. ISCAS (2024)
Liyan Chen, Jianfei Jiang, Qin Wang, Zhigang Mao, Naifeng Jing
Bridge-NDP: Achieving Efficient Communication-Computation Overlap in Near Data Processing with Bridge Architecture. ASPDAC (2024)
Duo Yu, Ang Li, Naifeng Jing, Jianfei Jiang, Weiguang Sheng, Qin Wang
VDA: A Simple but Efficient Virtual-Channel-Based Deadlock Avoidance Scheme for Scalable Chiplet Networks. ACM Great Lakes Symposium on VLSI (2024)
Zhuoran Song, Heng Lu, Li Jiang, Naifeng Jing, Xiaoyao Liang
Real-Time Video Recognition via Decoder-Assisted Neural Network Acceleration Framework. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42 (7) (2023)
Jianing Gao, Lingyi Liu, Qin Wang, Naifeng Jing, Jianfei Jiang
High-Performance Genomic Analysis Heterogeneous System Using OpenCL. ASICON (2023)
Xiaolong Lin, Gang Li, Zizhao Liu, Yadong Liu, Fan Zhang, Zhuoran Song, Naifeng Jing, Xiaoyao Liang
AdaS: A Fast and Energy-Efficient CNN Accelerator Exploiting Bit-Sparsity. DAC (2023)
Jianing Gao, Qiming Shao, Fangyu Deng, Qin Wang, Naifeng Jing, Jianfei Jiang
An NoC-based CNN Accelerator for Edge Computing. ASICON (2023)
Pengyu Liu, Zihan Zhang, Chen Yin, Liyan Chen, Jianfei Jiang, Qin Wang, Zhigang Mao, Naifeng Jing
Pipeline Balancing for Integrated Mapping in High Performance Spatial Programmable Architecture. FPL (2023)
Zhuoran Song, Wanzhen Liu, Tao Yang, Fangxin Liu, Naifeng Jing, Xiaoyao Liang
A Point Cloud Video Recognition Acceleration Framework Based on Tempo-Spatial Information. IEEE Trans. Parallel Distributed Syst. 34 (12) (2023)
Zhuo Chen, Zihan Zhang, Jianfei Jiang, Weiguang Sheng, Qin Wang, Naifeng Jing
ReMap: Reorder Mapping for Multi-level Uneven Distribution on Sparse ReRAM Accelerator. ASICON (2023)
Yuqing Yang, Weidong Yang, Qin Wang, Naifeng Jing, Jianfei Jiang, Zhigang Mao, Weiguang Sheng
An Efficient near-Bank Processing Architecture for Personalized Recommendation System. ASP-DAC (2023)
Xuan Zhang, Zhuoran Song, Xing Li, Zhezhi He, Li Jiang, Naifeng Jing, Xiaoyao Liang
HyAcc: A Hybrid CAM-MAC RRAM-based Accelerator for Recommendation Model. ICCD (2023)
Naifeng Jing, Zihan Zhang, Yongshuai Sun, Pengyu Liu, Liyan Chen, Qin Wang, Jianfei Jiang
Exploiting bit sparsity in both activation and weight in neural networks accelerators. Integr. 88 (2023)
Zhuoran Song, Naifeng Jing, Xiaoyao Liang
PRADA: Point Cloud Recognition Acceleration via Dynamic Approximation. ACM TUR-C (2023)
Zhuoran Song, Heng Lu, Gang Li, Li Jiang, Naifeng Jing, Xiaoyao Liang
PRADA: Point Cloud Recognition Acceleration via Dynamic Approximation. DATE (2023)
Haifeng Xiang, Naifeng Jing, Jianfei Jiang, Hongbo Guo, Weiguang Sheng, Zhigang Mao, Qin Wang
RTMDet-R2: An Improved Real-Time Rotated Object Detector. PRCV (12) (2023)
Chen Yin, Naifeng Jing, Jianfei Jiang, Qin Wang, Zhigang Mao
A Reschedulable Dataflow-SIMD Execution for Increased Utilization in CGRA Cross-Domain Acceleration. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42 (3) (2023)
Shuya Ji, Weidong Yang, Jianfei Jiang, Naifeng Jing, Weiguang Sheng, Ang Li, Qin Wang
ACET: An Adaptive Clock Scheme Exploiting Comprehensive Timing Slack for Reconfigurable Processors. ICCD (2023)
Zhuoran Song, Naifeng Jing, Xiaoyao Liang
-VOR: An End-to-End En/Decoder Architecture for Efficient Video Object Recognition. ACM Trans. Design Autom. Electr. Syst. 28 (1) (2023)
Zhuoran Song, Yihong Xu, Han Li, Naifeng Jing, Xiaoyao Liang, Li Jiang
DNN Training Acceleration via Exploring GPGPU Friendly Sparsity. CoRR (2022)
Shengzhao Li, Qin Wang, Jianfei Jiang, Weiguang Sheng, Naifeng Jing, Zhigang Mao
An Efficient CNN Accelerator Using Inter-Frame Data Reuse of Videos on FPGAs. IEEE Trans. Very Large Scale Integr. Syst. 30 (11) (2022)
Mengyu Guo, Zihan Zhang, Jianfei Jiang, Qin Wang, Naifeng Jing
Boosting ReRAM-based DNN by Row Activation Oversubscription. ASP-DAC (2022)
Zhuoran Song, Zhongkai Yu, Naifeng Jing, Xiaoyao Liang
SR: an end-to-end video CODEC assisted system for super resolution acceleration. DAC (2022)
Fangxin Liu, Wenbo Zhao, Zongwu Wang, Yongbiao Chen, Zhezhi He, Naifeng Jing, Xiaoyao Liang, Li Jiang
EBSP: evolving bit sparsity patterns for hardware-friendly inference of quantized deep neural networks. DAC (2022)
Taozhong Li, Naifeng Jing, Zhigang Mao, Yiran Chen
A Hybrid-Grained Remapping Defense Scheme Against Hard Failures for Row-Column-NVM. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41 (6) (2022)
Xing Li, Rachata Ausavarungnirun, Xiao Liu, Xueyuan Liu, Xuan Zhang, Heng Lu, Zhuoran Song, Naifeng Jing, Xiaoyao Liang
Gzippo: Highly-Compact Processing-in-Memory Graph Accelerator Alleviating Sparsity and Redundancy. ICCAD (2022)
Zihan Zhang, Jianfei Jiang, Yongxin Zhu, Qin Wang, Zhigang Mao, Naifeng Jing
A Universal RRAM-Based DNN Accelerator With Programmable Crossbars Beyond MVM Operator. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41 (7) (2022)
Gang Li, Weixiang Xu, Zhuoran Song, Naifeng Jing, Jian Cheng, Xiaoyao Liang
Ristretto: An Atomized Processing Architecture for Sparsity-Condensed Stream Flow in CNN. MICRO (2022)
Heng Lu, Zhuoran Song, Xing Li, Naifeng Jing, Xiaoyao Liang
GCNTrain: A Unified and Efficient Accelerator for Graph Convolutional Neural Network Training. ICCD (2022)
Zhuoran Song, Yihong Xu, Zhezhi He, Li Jiang, Naifeng Jing, Xiaoyao Liang
CP-ViT: Cascade Vision Transformer Pruning via Progressive Sparsity Prediction. CoRR (2022)
Guochao Deng, Qin Wang, Jianfei Jiang, Qirun Hong, Naifeng Jing, Weiguang Sheng, Zhigang Mao
A Low Coupling and Lightweight Algorithm for Ship Detection in Optical Remote Sensing Images. IEEE Geosci. Remote. Sens. Lett. 19 (2022)
Taozhong Li, Naifeng Jing, Jianfei Jiang, Qin Wang, Zhigang Mao, Yiran Chen
A Novel Architecture Design for Output Significance Aligned Flow with Adaptive Control in ReRAM-based Neural Network Accelerator. ACM Trans. Design Autom. Electr. Syst. 27 (6) (2022)
Yilong Zhao, Li Jiang, Mingyu Gao, Naifeng Jing, Chengyang Gu, Qidong Tang, Fangxin Liu, Tao Yang, Xiaoyao Liang
RePAST: A ReRAM-based PIM Accelerator for Second-order Training of DNN. CoRR (2022)
Fangxin Liu, Wenbo Zhao, Yilong Zhao, Zongwu Wang, Tao Yang, Zhezhi He, Naifeng Jing, Xiaoyao Liang, Li Jiang
SME: ReRAM-based Sparse-Multiplication-Engine to Squeeze-Out Bit Sparsity of Neural Network. CoRR (2021)
Yongquan Shi, Yongshuai Sun, Jianfei Jiang, Guanghui He, Qin Wang, Naifeng Jing
Fast FPGA-Based Emulation for ReRAM-Enabled Deep Neural Network Accelerator. ISCAS (2021)
Yilong Zhao, Zhezhi He, Naifeng Jing, Xiaoyao Liang, Li Jiang
Re2PIM: A Reconfigurable ReRAM-Based PIM Design for Variable-Sized Vector-Matrix Multiplication. ACM Great Lakes Symposium on VLSI (2021)
Yongshuai Sun, Mengyu Guo, Dacheng Liang, Shan Tang, Naifeng Jing
Exploiting Dynamic Bit Sparsity in Activation for Deep Neural Network Acceleration. ASICON (2021)
Zhuojun Liang, Dongxu Lv, Chao Cui, Hai-Bao Chen, Weifeng He, Weiguang Sheng, Naifeng Jing, Zhigang Mao, Guanghui He
A 3.85-Gb/s 8 × 8 Soft-Output MIMO Detector With Lattice-Reduction-Aided Channel Preprocessing. IEEE Trans. Very Large Scale Integr. Syst. 29 (2) (2021)
Zhuoran Song, Yanan Sun, Lerong Chen, Tianjian Li, Naifeng Jing, Xiaoyao Liang, Li Jiang
ITT-RNA: Imperfection Tolerable Training for RRAM-Crossbar-Based Deep Neural-Network Accelerator. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 40 (1) (2021)
Feiyang Wu, Zhuoran Song, Jing Ke, Li Jiang, Naifeng Jing, Xiaoyao Liang
PIPArch: Programmable Image Processing Architecture Using Sliding Array. ISPA/BDCloud/SocialCom/SustainCom (2021)
Zihan Zhang, Jianfei Jiang, Weiguang Sheng, Qin Wang, Zhigang Mao, Naifeng Jing
A Mapping Method for Reconfigurable Array based on Decoupled DataFlow. BigDataSecurity (2021)
Chen Yin, Qin Wang, Jianfei Jiang, Weiguang Sheng, Guanghui He, Zhigang Mao, Naifeng Jing
Subgraph Decoupling and Rescheduling for Increased Utilization in CGRA Architecture. DATE (2021)
Tu Hong, Ning Guan, Chen Yin, Qin Wang, Jianfei Jiang, Jing Jin, Guanghui He, Naifeng Jing
Decoupling the Multi-Rate Dataflow Execution in Coarse-Grained Reconfigurable Array. ISCAS (2020)
Tao Yang, Yunkun Liao, Jianping Shi, Yun Liang, Naifeng Jing, Li Jiang
A Winograd-Based CNN Accelerator with a Fine-Grained Regular Sparsity Pattern. FPL (2020)
Zhuoran Song, Bangqi Fu, Feiyang Wu, Zhaoming Jiang, Li Jiang, Naifeng Jing, Xiaoyao Liang
DRQ: Dynamic Region-based Quantization for Deep Neural Network Acceleration. ISCA (2020)
Jing Ke, Yiqing Shen, Jason D. Wright, Naifeng Jing, Xiaoyao Liang, Dinggang Shen
Identifying patch-level MSI from histological images of Colorectal Cancer by a Knowledge Distillation Model. BIBM (2020)
B. O. Peng, Yongxin Zhu, Naifeng Jing, Xiaoying Zheng, Yueying Zhou
Design of a Hardware Accelerator for Zero-Knowledge Proof in Blockchains. SmartCom (2020)
Zihan Zhang, Taozhong Li, Ning Guan, Qin Wang, Guanghui He, Weiguang Sheng, Zhigang Mao, Naifeng Jing
Enabling Resistive-RAM-based Activation Functions for Deep Neural Network Acceleration. ACM Great Lakes Symposium on VLSI (2020)
Ran Wang, Yuekang Guo, Jing Jin, Xiaoming Liu, Naifeng Jing, Jianjun Zhou
A Low Power Temperature-Compensated Common-Mode Voltage Detector for Dynamic Amplifiers. ISCAS (2020)
Zhaoming Jiang, Zhuoran Song, Xiaoyao Liang, Naifeng Jing
PRArch: Pattern-Based Reconfigurable Architecture for Deep Neural Network Acceleration. HPCC/DSS/SmartCity (2020)
Zhuoran Song, Jianfei Wang, Tianjian Li, Li Jiang, Jing Ke, Xiaoyao Liang, Naifeng Jing
GPNPU: Enabling Efficient Hardware-Based Direct Convolution with Multi-Precision Support in GPU Tensor Cores. DAC (2020)
Zhuoran Song, Feiyang Wu, Xueyuan Liu, Jing Ke, Naifeng Jing, Xiaoyao Liang
VR-DANN: Real-Time Video Recognition via Decoder-Assisted Neural Network Acceleration. MICRO (2020)
Jing Ke, Changchang Liu, Yizhou Lu, Naifeng Jing, Xiaoyao Liang, Fusong Jiang
FIMIL : A high-throughput deep learning model for abnormality detection with weak annotation in microscopy images. ACSW (2020)
Jing Ke, Yiqing Shen, Yi Guo, Jason D. Wright, Naifeng Jing, Xiaoyao Liang
A High-Throughput Tumor Location System with Deep Learning for Colorectal Cancer Histopathology Image. AIME (2020)
Tao Zhou, Yongxin Zhu, Naifeng Jing, Tianhao Nan, Wanyi Li, Bo Peng
Reliable SoC Design and Implementation of SHA-3-HMAC Algorithm with Attack Protection. SmartCloud (2020)
Yijia Zhang, Weiguang Sheng, Jian-Fei Jiang, Naifeng Jing, Qin Wang, Zhigang Mao
Priority Branches for Ship Detection in Optical Remote Sensing Images. Remote. Sens. 12 (7) (2020)
Guanghui He, Sijie Zheng, Naifeng Jing
A Hierarchical Scrubbing Technique for SEU Mitigation on SRAM-Based FPGAs. IEEE Trans. Very Large Scale Integr. Syst. 28 (10) (2020)
Yanan Sun, Jiawei Gu, Weifeng He, Qin Wang, Naifeng Jing, Zhigang Mao, Weikang Qian, Li Jiang
Energy-Efficient Nonvolatile SRAM Design Based on Resistive Switching Multi-Level Cells. IEEE Trans. Circuits Syst. II Express Briefs (5) (2019)
Li Jiang, Zhuoran Song, Haiyue Song, Chengwen Xu, Qiang Xu, Naifeng Jing, Weifeng Zhang, Xiaoyao Liang
Energy-Efficient and Quality-Assured Approximate Computing Framework Using a Co-Training Method. ACM Trans. Design Autom. Electr. Syst. 24 (6) (2019)
Shuo Zhang, Guanghui He, Hai-Bao Chen, Naifeng Jing, Qin Wang
Scale Adaptive Proposal Network for Object Detection in Remote Sensing Images. IEEE Geosci. Remote. Sens. Lett. 16 (6) (2019)
Houxiang Ji, Li Jiang, Tianjian Li, Naifeng Jing, Jing Ke, Xiaoyao Liang
HUBPA: high utilization bidirectional pipeline architecture for neuromorphic computing. ASP-DAC (2019)
Qin Wang, Zechen Liu, Jian-Fei Jiang, Naifeng Jing, Weiguang Sheng
A New Cellular-Based Redundant TSV Structure for Clustered Faults. IEEE Trans. Very Large Scale Integr. Syst. 27 (2) (2019)
Taozhong Li, Qin Wang, Yongxin Zhu, Jian-Fei Jiang, Guanghui He, Jing Jin, Zhigang Mao, Naifeng Jing
A Novel Resistive Memory-based Process-in-memory Architecture for Efficient Logic and Add Operations. ACM Trans. Design Autom. Electr. Syst. 24 (2) (2019)
Sijie Zheng, Hongjun You, Guanghui He, Qin Wang, Tao Si, Jian-Fei Jiang, Jing Jin, Naifeng Jing
A Rapid Scrubbing Technique for SEU Mitigation on SRAM-Based FPGAs. ISCAS (2019)
Jianfei Wang, Li Jiang, Jing Ke, Xiaoyao Liang, Naifeng Jing
A sharing-aware L1.5D cache for data reuse in GPGPUs. ASP-DAC (2019)
Zhenghao Peng, Xuyang Chen, Chengwen Xu, Naifeng Jing, Xiaoyao Liang, Cewu Lu, Li Jiang
AXNet: approximate computing using an end-to-end trainable neural network. ICCAD (2018)
Haiyue Song, Chengwen Xu, Qiang Xu, Zhuoran Song, Naifeng Jing, Xiaoyao Liang, Li Jiang
Invocation-driven neural approximate computing with a multiclass-classifier and multiple approximators. ICCAD (2018)
Haiyue Song, Chengwen Xu, Qiang Xu, Zhuoran Song, Naifeng Jing, Xiaoyao Liang, Li Jiang
Invocation-driven Neural Approximate Computing with a Multiclass-Classifier and Multiple Approximators. CoRR (2018)
Haiyue Song, Xiang Song, Tianjian Li, Hao Dong, Naifeng Jing, Xiaoyao Liang, Li Jiang
A FPGA Friendly Approximate Computing Framework with Hybrid Neural Networks: (Abstract Only). FPGA (2018)
Zhenghao Peng, Xuyang Chen, Chengwen Xu, Naifeng Jing, Xiaoyao Liang, Cewu Lu, Li Jiang
AXNet: ApproXimate computing using an end-to-end trainable neural network. CoRR (2018)
Li Jiang, Tianjian Li, Naifeng Jing, Nam Sung Kim, Minyi Guo, Xiaoyao Liang
CNFET-Based High Throughput SIMD Architecture. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37 (7) (2018)
Jianfei Wang, Qin Wang, Li Jiang, Chao Li, Xiaoyao Liang, Naifeng Jing
IBOM: An Integrated and Balanced On-Chip Memory for High Performance GPGPUs. IEEE Trans. Parallel Distributed Syst. 29 (3) (2018)
Xinchi Gao, Licheng Xu, Jing Jin, Naifeng Jing, Jianjun Zhou
A wideband simplified transformer-based VCO with digital amplitude calibration. MWSCAS (2017)
Wei Jin, Weifeng He, Jian-Fei Jiang, Haichao Huang, Xuejun Zhao, Yanan Sun, Xin Chen, Naifeng Jing
A 0.33 V 2.5 μW cross-point data-aware write structure, read-half-select disturb-free sub-threshold SRAM in 130 nm CMOS. Integr. 58 (2017)
Tianjian Li, Xiangyu Bi, Naifeng Jing, Xiaoyao Liang, Li Jiang
Sneak-Path Based Test and Diagnosis for 1R RRAM Crossbar Using Voltage Bias Technique. DAC (2017)
Jianfei Wang, Fengfeng Fan, Li Jiang, Xiaoyao Liang, Naifeng Jing
Incorporating selective victim cache into GPGPU for high-performance computing. Concurr. Comput. Pract. Exp. 29 (24) (2017)
Naifeng Jing, Shunning Jiang, Shuang Chen, Jingjie Zhang, Li Jiang, Chao Li, Xiaoyao Liang
Bank Stealing for a Compact and Efficient Register File Architecture in GPGPU. IEEE Trans. Very Large Scale Integr. Syst. 25 (2) (2017)
Chengwen Xu, Xiangyu Wu, Wenqi Yin, Qiang Xu, Naifeng Jing, Xiaoyao Liang, Li Jiang
On Quality Trade-off Control for Approximate Computing Using Iterative Training. DAC (2017)
Naifeng Jing, Taozhong Li, Zhongyuan Zhao, Wei Jin, Yanan Sun, Weifeng He, Zhigang Mao
Enabling in-situ logic-in-memory capability using resistive-RAM crossbar memory. FPT (2016)
Tianjian Li, Li Jiang, Naifeng Jing, Nam Sung Kim, Xiaoyao Liang
CNFET-based high throughput register file architecture. ICCD (2016)
Fengfeng Fan, Jianfei Wang, Li Jiang, Xiaoyao Liang, Naifeng Jing
Applying Victim Cache in High Performance GPGPU Computing. ISPDC (2016)
Tianjian Li, Feng Xie, Xiaoyao Liang, Qiang Xu, Krishnendu Chakrabarty, Naifeng Jing, Li Jiang
A Novel Test Method for Metallic CNTs in CNFET-Based SRAMs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 35 (7) (2016)
Naifeng Jing, Li Jiang, Tao Zhang, Chao Li, Fengfeng Fan, Xiaoyao Liang
Energy-Efficient eDRAM-Based On-Chip Storage Architecture for GPGPUs. IEEE Trans. Computers 65 (1) (2016)
Naifeng Jing, Jianfei Wang, Fengfeng Fan, Wenkang Yu, Li Jiang, Chao Li, Xiaoyao Liang
Cache-emulated register file: An integrated on-chip memory architecture for high performance GPGPUs. MICRO (2016)
Chen Wang, Li Jiang, Shiyan Hu, Tianjian Li, Xiaoyao Liang, Naifeng Jing, Weikang Qian
Timing-driven placement for carbon nanotube circuits. SoCC (2015)
Zhongyuan Zhao, Weiguang Sheng, Naifeng Jing, Weifeng He, Zhigang Mao
Resource-saving compile flow for coarse-grained reconfigurable architectures. ReConFig (2015)
Feng Xie, Xiaoyao Liang, Qiang Xu, Krishnendu Chakrabarty, Naifeng Jing, Li Jiang
Jump test for metallic CNTs in CNFET-based SRAM. DAC (2015)
Naifeng Jing, Jiacheng Zhou, Jian-Fei Jiang, Xin Chen, Weifeng He, Zhigang Mao
Redundancy based Interconnect Duplication to Mitigate Soft Errors in SRAM-based FPGAs. ICCAD (2015)
Xiangyu Wu, Yuanfang Xia, Naifeng Jing, Xiaoyao Liang
CGSharing: Efficient content sharing in GPU-based cloud gaming. ISLPED (2015)
Naifeng Jing, Shuang Chen, Shunning Jiang, Li Jiang, Chao Li, Xiaoyao Liang
Bank stealing for conflict mitigation in GPGPU Register File. ISLPED (2015)
Li Jiang, Pu Pang, Naifeng Jing, Sung Kyu Lim, Xiaoyao Liang, Qiang Xu
On diagnosable and tunable 3D clock network design for lifetime reliability enhancement. ITC (2015)
Tao Zhang, Naifeng Jing, Kaiming Jiang, Wei Shu, Min-You Wu, Xiaoyao Liang
Buddy SM: Sharing Pipeline Front-End for Improved Energy Efficiency in GPGPUs. ACM Trans. Archit. Code Optim. 12 (2) (2015)
Zhe Feng, Naifeng Jing, Lei He
IPF: In-Place X-Filling Algorithm for the Reliability of Modern FPGAs. IEEE Trans. Very Large Scale Integr. Syst. 22 (10) (2014)

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Publication Activity (10 Years)

Top Topics

Top Venues

Naifeng Jing