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Redundancy based Interconnect Duplication to Mitigate Soft Errors in SRAM-based FPGAs.

Naifeng JingJiacheng ZhouJian-Fei JiangXin ChenWeifeng HeZhigang Mao
Published in: ICCAD (2015)
Keyphrases
  • genetic algorithm
  • power consumption
  • high speed
  • error propagation
  • database
  • input output
  • error detection
  • hardware software
  • real time
  • low power
  • hardware implementation
  • field programmable gate array