Minoru Watanabe

Publication Activity (10 Years)

Years Active: 2002-2024
Publications (10 Years): 38

Top Venues

ICCE

ISCAS

AHS

ARC

Publications

Akifumi Ogiwara, Minoru Watanabe
Holographic memory formed by different laser wavelengths in laser combiner system for optically reconfigurable gate array. ICCE (2024)
Minoru Watanabe
Analysis of Clock Tree Buffer Degradation Caused by Radiation. ARC (2024)
Sae Goto, Minoru Watanabe, Akifumi Ogiwara, Nobuya Watanabe
Parallel configuration experiment for a radiation-hardened optically reconfigurable gate array with a holographic polymer-dispersed liquid crystal memory. ICCE (2024)
Minoru Watanabe, Makoto Inami Kobayashi, Mitsutaka Isobe, Kunihiro Ogawa, Shigeo Matsuyama, Misako Miwa
Fast-neutron soft-error tolerance experimentation with a radiation-hardened optically reconfigurable gate array. ICCE (2024)
Atsushi Takata, Minoru Watanabe, Nobuya Watanabe
Wafer-scale VLSI realization using programmable architecture. ICCE (2024)
Nobuya Watanabe, Ryoya Ishitani, Minoru Watanabe
Application design system for high-speed dynamically reconfigurable gate arrays. ICCE (2024)
Utsuki Sekioka, Minoru Watanabe, Nobuya Watanabe
Remote monitoring system for optically reconfigurable gate arrays in radiation environments. ICCE (2024)
Takato Tanizawa, Minoru Watanabe
Radiation-hardened stabilized power supply unit based on bipolar transistors. ICM (2023)
Minoru Watanabe
Radiation-hardened triple-modular redundant field programmable gate array with a two-phase clock. ISCAS (2023)
Daisuke Bamba, Minoru Watanabe, Nobuya Watanabe
Total-Ionizing-Dose Tolerance Analysis of a Radiation-Hardened Image Sensor. ICCE (2023)
Masashi Tsujino, Minoru Watanabe, Nobuya Watanabe
An optically reconfigurable gate array VLSI driven by an unstabilized power supply unit. SOCC (2023)
Kakeru Ando, Minoru Watanabe, Nobuya Watanabe
Multi-context-scrubbing operation for a 1-bit counter circuit. NEWCAS (2023)
Kaho Yamada, Takeshi Okazaki, Minoru Watanabe, Nobuya Watanabe
Total Dose Tolerance Analysis of an Optically Reconfigurable Gate Array VLSI. ICECS 2022 (2022)
Akihiko Ushiroyama, Minoru Watanabe, Nobuya Watanabe, Akira Nagoya
Convolutional neural network implementations using Vitis AI. CCWC (2022)
Sae Goto, Minoru Watanabe, Nobuya Watanabe
Optically Reconfigurable Gate Array VLSI That Can Support a Perfect Parallel Configuration. APCCAS (2022)
Kurea Murakami, Minoru Watanabe
Sequential Circuit Implementation Method for Multi-Context Scrubbing Operations on FPGAs. ISCAS (2021)
Hirotoshi Ito, Minoru Watanabe
Total-ionizing-dose tolerance evaluation of an optoelectronic field programmable gate array VLSI during operation. FPT (2021)
Hirotoshi Ito, Minoru Watanabe
Radiation-degradation Analysis and a Circuit Performance Improvement Method for Optoelectronic Field Programmable Gate Array. SoCC (2019)
Masaki Watanabe, Minoru Watanabe
Full-hardware triple modular and penta-modular redundancies using a high frequency majority voting operation. APCCAS (2019)
Yusuke Takaki, Kohei Nagasu, Shin Abiko, Minoru Watanabe, Kentaro Sano
FPGA implementation of a robot control algorithm. ETFA (2019)
Takumi Fujimori, Minoru Watanabe
High total-ionizing-dose tolerance field programmable gate array. ISCAS (2018)
Minoru Watanabe
Foreword. IEICE Trans. Inf. Syst. (2) (2018)
Takumi Fujimori, Minoru Watanabe
A 400 Mrad radiation-hardened optoelectronic embedded system with a silver-halide holographic memory. AHS (2018)
Hiroki Shinba, Minoru Watanabe
Optically reconfigurable gate array platform for mono-instruction set computer architecture. CCWC (2017)
Takumi Fujimori, Minoru Watanabe
Radiation tolerance demonstration of high-speed scrubbing on an optically reconfigurable gate array. SoCC (2017)
Takumi Fujimori, Minoru Watanabe
Multi-context scrubbing method. MWSCAS (2017)
Takumi Fujimori, Minoru Watanabe
Holographic Memory Calculation FPGA Accelerator for Optically Reconfigurable Gate Arrays. DASC/PiCom/DataCom/CyberSciTech (2017)
Yoshizumi Ito, Minoru Watanabe, Akifumi Ogiwara
500 Mrad total-ionizing-dose tolerance of a holographic memory on an optical FPGA. AHS (2017)
Shinya Furukawa, Ili Shairah Abdul Halim, Minoru Watanabe, Fuminori Kobayashi
Direct optical communication on an optically reconfigurable gate array. FGCT (2016)
Bharat Ramanathan, Minoru Watanabe
Photodiode sensitivity measurement methodology using low light intensity for optically reconfigurable gate arrays. ICCSE (2016)
Yoshizumi Ito, Minoru Watanabe, Akifumi Ogiwara
A 200 Mrad Radiation Tolerance of a Polymer-Dispersed Liquid Crystal Holographic Memory. HPCC/SmartCity/DSS (2016)
Takumi Fujimori, Minoru Watanabe
Full FPGA game machine. ICCE (2016)
Tomoya Akabe, Minoru Watanabe
Reconfiguration Performance Recovery on Optically Reconfigurable Gate Arrays. VLSI Design (2016)
Retsu Moriwaki, Hiroyuki Ito, Kouta Akagi, Minoru Watanabe, Akifumi Ogiwara
Total Ionizing Dose Effects of Optical Components on an Optically Reconfigurable Gate Array. ARC (2015)
Minoru Watanabe, Takumi Fujimori
Holographic scrubbing technique for a programmable gate array. AHS (2015)
Minoru Watanabe
Sustainable advantage of a parallel configuration in an optical FPGA. SII (2015)
Takumi Fujimori, Tomoya Akabe, Yoshizumi Ito, Kouta Akagi, Shinya Furukawa, Hiroki Shinba, Aoi Tanibata, Minoru Watanabe
FPGA Trax Solver based on a neural network design. FPT (2015)
Takumi Fujimori, Minoru Watanabe
Parallel-Operation-Oriented Optically Reconfigurable Gate Array. ARCS (2015)
Retsu Moriwaki, Hikaru Maekawa, Akifumi Ogiwara, Minoru Watanabe
Optically reconfigurable gate array with an angle-multiplexed holographic memory. ACM Great Lakes Symposium on VLSI (2014)
Yuki Kamikubo, Minoru Watanabe, Shoji Kawahito
Image recognition system using an optical Fourier transform on a dynamically reconfigurable vision architecture. ISCAS (2014)
Takumi Fujimori, Minoru Watanabe
Radiation Tolerance of Color Configuration on an Optically Reconfigurable Gate Array. IPDPS Workshops (2014)
Takashi Yoza, Minoru Watanabe
Enhanced Radiation Tolerance of an Optically Reconfigurable Gate Array by Exploiting an Inversion/Non-inversion Implementation. ARC (2014)
Akira Tanigawa, Minoru Watanabe
Dependability-increasing technique for a multi-context optically reconfigurable gate array. ISCAS (2013)
Hiroyuki Ito, Minoru Watanabe
Fourier transformation on an optically reconfigurable gate array. MWSCAS (2013)
Takashi Yoza, Retsu Moriwaki, Yuki Torigai, Yuki Kamikubo, Takayuki Kubota, Takahiro Watanabe, Takumi Fujimori, Hiroyuki Ito, Masato Seo, Kouta Akagi, Yuichiro Yamaji, Minoru Watanabe
FPGA Blokus Duo Solver using a massively parallel architecture. FPT (2013)
Takayuki Kubota, Minoru Watanabe
0.18 μm CMOS process photodiode memory. ISCAS (2013)
Yuki Kamikubo, Minoru Watanabe, Shoji Kawahito
Image recognition operation on a dynamically reconfigurable vison architecture. FPL (2013)
Yuichiro Yamaji, Minoru Watanabe
Four-configuration-context optically reconfigurable gate array with a MEMS interleaving method. AHS (2013)
Takumi Fujimori, Minoru Watanabe
Color configuration method for an optically reconfigurable gate array. FPT (2013)
Yuya Shirahashi, Minoru Watanabe
Dependability-Increasing Method of Processors under a Space Radiation Environment. ARC (2013)
Takahiro Watanabe, Minoru Watanabe
0.18-um CMOS Process Highly Sensitive Differential Optically Reconfigurable Gate Array VLSI. ISVLSI (2012)
Takahiro Watanabe, Minoru Watanabe
Triple Module Redundancy of a Laser Array Driver Circuit for Optically Reconfigurable Gate Arrays. ARC (2012)
Takahiro Watanabe, Minoru Watanabe
0.18 μm CMOS proess high-sensitivity optially reonfgurable gatearray VLSI. SIGARCH Comput. Archit. News 40 (5) (2012)
Hiroyuki Ito, Minoru Watanabe
A Uniform Partitioning Method for Mono-Instruction Set Computer (MISC). NBiS (2012)
Takashi Yoza, Minoru Watanabe
A 16-configuration-context robust optically reconfigurable gate array with a reconfiguration speed adjustment function. FPL (2012)
Takahiro Watanabe, Minoru Watanabe
High Speed - Low Power Optical Configuration on an ORGA with a Phase-modulation Type Holographic Memory. IPDPS Workshops (2012)
Yuki Kamikubo, Minoru Watanabe, Shoji Kawahito
Gray-level image recognition on a dynamically reconfigurable vision architecture. SoCC (2012)
Takahiro Watanabe, Minoru Watanabe
Inversion/non-inversion reconfiguration scheme for a 0.18 J.1m CMOS process optically reconfigurable gate array VLSI. MWSCAS (2012)
Takashi Yoza, Minoru Watanabe
A 16-configuration-context dynamic optically reconfigurable gate array with a dependable laser array. AHS (2012)
Takahiro Watanabe, Retsu Moriwaki, Yuichiro Yamaji, Yuki Kamikubo, Yuki Torigai, Yuki Nihira, Takashi Yoza, Yumiko Ueno, Yuji Aoyama, Minoru Watanabe
An FPGA Connect6 Solver with a two-stage pipelined evaluation. FPT (2011)
Takahiro Watanabe, Minoru Watanabe
Dependable Optically Reconfigurable Gate Array with a Phase-Modulation Type Holographic Memory. FPL (2011)
Shinya Kubota, Minoru Watanabe
A MEMS writer system embedded for a programmable optically reconfigurable gate array. SIGARCH Comput. Archit. News 39 (4) (2011)
Takayuki Mabuchi, Minoru Watanabe, Akifumi Ogiwara, Fuminori Kobayashi
Optically reconflgurable gate array with a polymer-dispersed liquid crystal holographic memory. AHS (2011)
Hironobu Morita, Minoru Watanabe
MEMS Interleaving Read Operation of a Holographic Memory for Optically Reconfigurable Gate Arrays. ARC (2011)
Yuichiro Yamaji, Minoru Watanabe
A 144-configuration context MEMS optically reconfigurable gate array. SoCC (2011)
Yuki Torigai, Minoru Watanabe
Triple module redundancy scheme on an optically reconfigure gate array. ISOCC (2011)
Mao Nakajima, Minoru Watanabe
Fast Optical Reconfiguration of a Nine-Context DORGA Using a Speed Adjustment Control. ACM Trans. Reconfigurable Technol. Syst. 4 (2) (2011)
Maki Yasuda, Minoru Watanabe
Dynamically Reconfigurable Vision-Chip Architecture. FPL (2010)
Yuji Aoyama, Minoru Watanabe
Acceleration method of optical reconfigurations using analog configuration contexts. AHS (2010)
Yuji Aoyama, Minoru Watanabe
Estimation of characteristic variation of photodiodes and its compensation method in an optically reconfigurable gate array. SoCC (2010)
Takayuki Mabuchi, Takahiro Watanabe, Retsu Moriwaki, Yuji Aoyama, Amarjargal Gundjalam, Yuichiro Yamaji, Hironari Nakada, Minoru Watanabe
Othello Solver based on a soft-core MIMD processor array. FPT (2010)
Daisaku Seto, Minoru Watanabe
Partial Block-by-Block Reconfiguration for a Dynamic Optically Reconfigurable Gate Array. ERSA (2010)
Daisaku Seto, Minoru Watanabe
Recovery Method for a Laser Array Failure on Dynamic Optically Reconfigurable Gate Arrays. DFT (2010)
Daisaku Seto, Minoru Watanabe
MEMS Dynamic Optically Reconfigurable Gate Array Usable under a Space Radiation Environment. ARC (2010)
Hironobu Morita, Minoru Watanabe
Binary MEMS Optically Reconfigurable Gate Array. ACIS-ICIS (2010)
Mao Nakajima, Minoru Watanabe
A 100-context optically reconfigurable gate array. ISCAS (2010)
Yuichiro Yamaji, Minoru Watanabe
A 64-context MEMS optically reconfigurable gate array. FPT (2010)
Daisaku Seto, Minoru Watanabe
Recovery method for a turn-off failure mode of a laser array on an ORGA. AHS (2010)
Mao Nakajima, Minoru Watanabe
Fast Optical Reconfiguration of a Nine-Context DORGA. ARC (2009)
Shinichi Kato, Minoru Watanabe
Inversion/Non-inversion Implementation for an 11, 424 Gate-Count Dynamic Optically Reconfigurable Gate Array VLSI. SAMOS (2009)
Mao Nakajima, Minoru Watanabe
A Sixteen-Context Dynamic Optically Reconfigurable Gate Array. AHS (2009)
Takayuki Mabuchi, Kenji Miyashiro, Minoru Watanabe, Akifumi Ogiwara
Defect Tolerance of an Optically Reconfigurable Gate Array with a One-time Writable Volume Holographic Memory. AHS (2009)
Mao Nakajima, Minoru Watanabe
Fast Reconfiguration Experiments of an Optically Differential Reconfigurable Gate Array with Nine Configuration Contexts. ISCAS (2009)
Daisaku Seto, Minoru Watanabe
An 11, 424 gate-count dynamic optically reconfigurable gate array with a photodiode memory architecture. ASP-DAC (2009)
Mao Nakajima, Minoru Watanabe
A 13.75 ns Holographic Reconfiguration of an Optically Differential Reconfigurable Gate Array. IIH-MSP (2009)
Hironobu Morita, Minoru Watanabe
Alignment compensation method for an optically reconfigurable gate array. ERSA (2009)
Shinya Kubota, Minoru Watanabe
A Multi-Context Programmable Optically Reconfigurable Gate Array. ERSA (2009)
Hironobu Morita, Minoru Watanabe
Mems optically reconfigurable gate array. FPL (2009)
Takayuki Mabuchi, Kenji Miyashiro, Minoru Watanabe, Akifumi Ogiwara
Optically Reconfigurable Gate Array with a One-Time Writable Holographic Memory. ERSA (2009)
Mao Nakajima, Minoru Watanabe
A 16-context Optically Reconfigurable Gate Array. ASAP (2009)
Shinya Kubota, Minoru Watanabe
A nine-context programmable optically reconfigurable gate array with semiconductor lasers. ACM Great Lakes Symposium on VLSI (2009)
Takayuki Mabuchi, Minoru Watanabe
An analog reconfiguration-period adjustment technique for optically reconfigurable gate arrays. FPT (2008)
Naoki Yamaguchi, Minoru Watanabe
An Optical Reconfiguration System with Four Contexts. VLSI Design (2008)
Kouhi Shinohara, Minoru Watanabe
A Double or Triple Module Redundancy Model Exploiting Dynamic Reconfigurations. AHS (2008)
Mao Nakajima, Minoru Watanabe
A 770ns Holographic Reconfiguration of a Four-Context DORGA. ERSA (2008)
Fuminori Kobayashi, Yasuyuki Morikawa, Minoru Watanabe
MISC: Mono Instruction-Set Computer based on Dynamic Reconfiguration - a 6502 Perspective. ERSA (2008)
Daisaku Seto, Minoru Watanabe
A Dynamic Optically Reconfigurable Gate Array with a Silver-Halide Holographic Memory. ISVLSI (2008)
Shinichi Kato, Minoru Watanabe
Inversion/non-inversion zero-overhead dynamic optically reconfigurable gate array VLSI. FPT (2008)
Minoru Watanabe, Naoki Yamaguchi
An Acceleration and Optimization Method for Optical Reconfiguration. VLSI Design (2008)
Daisaku Seto, Minoru Watanabe
Analysis of retention time under multi-configuration on a DORGA. SoCC (2008)

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Publication Activity (10 Years)

Top Topics

Top Venues

Minoru Watanabe