Login / Signup
Defect Tolerance of an Optically Reconfigurable Gate Array with a One-time Writable Volume Holographic Memory.
Takayuki Mabuchi
Kenji Miyashiro
Minoru Watanabe
Akifumi Ogiwara
Published in:
AHS (2009)
Keyphrases
</>
gate array
low power
low cost
general purpose
reconfigurable architecture
genetic algorithm
real time
neural network
information systems
evolutionary algorithm
fault tolerant
logic circuits
multi objective evolutionary