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An FPGA Connect6 Solver with a two-stage pipelined evaluation.
Takahiro Watanabe
Retsu Moriwaki
Yuichiro Yamaji
Yuki Kamikubo
Yuki Torigai
Yuki Nihira
Takashi Yoza
Yumiko Ueno
Yuji Aoyama
Minoru Watanabe
Published in:
FPT (2011)
Keyphrases
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neural network
data sets
low cost
real time
data mining
information retrieval
website
image sequences
signal processing
hardware implementation
data flow
evaluation methods
parallel architecture
real time image processing