Fourier transformation on an optically reconfigurable gate array.

Hiroyuki Ito Minoru Watanabe

Published in: MWSCAS (2013)

Keyphrases

fourier transformation
gate array
low power
low cost
logic circuits
fast fourier transform
high speed
power consumption
hardware implementation
field programmable gate array
fourier transform
real time
multiresolution
feature detection
parallel computing