Optically reconfigurable gate array platform for mono-instruction set computer architecture.

Hiroki Shinba Minoru Watanabe

Published in: CCWC (2017)

Keyphrases

computer architecture
instruction set
gate array
computer systems
low power
low cost
parallel computers
high performance computing
parallel computing
computer science
general purpose
logic circuits
real time
hardware implementation
numerical methods
data processing
artificial intelligence
high speed