Optically Reconfigurable Gate Array with a One-Time Writable Holographic Memory.

Takayuki Mabuchi Kenji Miyashiro Minoru Watanabe Akifumi Ogiwara

Published in: ERSA (2009)

Keyphrases

gate array
low power
low cost
logic circuits
reconfigurable architecture
general purpose
hardware implementation
systolic array
power consumption
fine grain
coarse grain
machine learning
dynamic reconfiguration