Glenn Reinman

Publication Activity (10 Years)

Years Active: 1998-2024
Publications (10 Years): 13

Top Topics

Tightly Coupled

Single Instruction Multiple Data

Quantitative Analysis

Top Venues

ACM Trans. Embed. Comput. Syst.

Publications

Yuyue Wang, Xiurui Pan, Yuda An, Jie Zhang, Glenn Reinman
BeaconGNN: Large-Scale GNN Acceleration with Out-of-Order Streaming In-Storage Computing. HPCA (2024)
Nazanin Farahpour, Zhenman Fang, Glenn Reinman
FPGA-based Near Data Processing Platform Selection Using Fast Performance Modeling (WiP Paper). LCTES (2020)
Nazanin Farahpour, Yuchen Hao, Zhenman Fang, Glenn Reinman
Reconfigurable Accelerator Compute Hierarchy: A Case Study using Content-Based Image Retrieval. IISWC (2020)
Young-kyu Choi, Jason Cong, Zhenman Fang, Yuchen Hao, Glenn Reinman, Peng Wei
In-Depth Analysis on Microarchitectures of Modern Heterogeneous CPU-FPGA Platforms. ACM Trans. Reconfigurable Technol. Syst. 12 (1) (2019)
Zhenman Fang, Farnoosh Javadi, Jason Cong, Glenn Reinman
Understanding Performance Gains of Accelerator-Rich Architectures. ASAP (2019)
Yuchen Hao, Zhenman Fang, Glenn Reinman, Jason Cong
Supporting Address Translation for Accelerator-Centric Architectures. HPCA (2017)
Jason Cong, Zhenman Fang, Michael Gill, Farnoosh Javadi, Glenn Reinman
AIM: accelerating computational genomics through scalable and noninvasive accelerator-interposed memory. MEMSYS (2017)
Robert Chen, Glenn Reinman
CHILL: a system for fine-grained mapping of chained high impact long-latency load phases on tightly coupled heterogeneous multi-cores. Int. J. High Perform. Syst. Archit. 7 (1) (2017)
Young-kyu Choi, Jason Cong, Zhenman Fang, Yuchen Hao, Glenn Reinman, Peng Wei
A quantitative analysis on microarchitectures of modern CPU-FPGA platforms. DAC (2016)
Beayna Grigorian, Glenn Reinman
Accelerating Divergent Applications on SIMD Architectures Using Neural Networks. ACM Trans. Archit. Code Optim. 12 (1) (2015)
Jason Cong, Zhenman Fang, Michael Gill, Glenn Reinman
PARADE: A Cycle-Accurate Full-System Simulation Platform for Accelerator-Rich Architectural Design and Exploration. ICCAD (2015)
Jason Cong, Michael Gill, Yuchen Hao, Glenn Reinman, Bo Yuan
On-chip interconnection network for accelerator-rich architectures. DAC (2015)
Beayna Grigorian, Nazanin Farahpour, Glenn Reinman
BRAINIAC: Bringing reliable accuracy into neurally-implemented approximate computing. HPCA (2015)
Beayna Grigorian, Glenn Reinman
Dynamically adaptive and reliable approximate computing using light-weight error analysis. AHS (2014)
Jason Cong, Mohammad Ali Ghodrat, Michael Gill, Beayna Grigorian, Glenn Reinman
Architecture Support for Domain-Specific Accelerator-Rich CMPs. ACM Trans. Embed. Comput. Syst. 13 (4s) (2014)
Beayna Grigorian, Glenn Reinman
Accelerating divergent applications on SIMD architectures using neural networks. ICCD (2014)
Jason Cong, Mohammad Ali Ghodrat, Michael Gill, Beayna Grigorian, Karthik Gururaj, Glenn Reinman
Accelerator-Rich Architectures: Opportunities and Progresses. DAC (2014)
Chunhua Xiao, M.-C. Frank Chang, Jason Cong, Michael Gill, Zhangqin Huang, Chunyue Liu, Glenn Reinman, Hao Wu
Stream arbitration: Towards efficient bandwidth utilization for emerging on-chip interconnects. ACM Trans. Archit. Code Optim. 9 (4) (2013)
Jason Cong, Mohammad Ali Ghodrat, Michael Gill, Beayna Grigorian, Hui Huang, Glenn Reinman
Composable accelerator-rich microprocessor enhanced for adaptivity and longevity. ISLPED (2013)
Yu-Ting Chen, Jason Cong, Hui Huang, Chunyue Liu, Raghu Prabhakar, Glenn Reinman
Static and dynamic co-optimizations for blocks mapping in hybrid caches. ISLPED (2012)
Hao Wu, Lan Nan, Sai-Wang Tam, Hsieh-Hung Hsieh, Chewnpu Jou, Glenn Reinman, Jason Cong, Mau-Chung Frank Chang
A 60GHz on-chip RF-Interconnect with λ/4 coupler for 5Gbps bi-directional communication and multi-drop arbitration. CICC (2012)
Yanghyo Kim, Gyungsu Byun, Adrian Tang, Chewnpu Jou, Hsieh-Hung Hsieh, Glenn Reinman, Jason Cong, Mau-Chung Frank Chang
An 8Gb/s/pin 4pJ/b/pin Single-T-Line dual (base+RF) band simultaneous bidirectional mobile memory I/O interface with inter-channel interference suppression. ISSCC (2012)
Kanit Therdsteerasukdi, Gyungsu Byun, Jason Cong, M. Frank Chang, Glenn Reinman
Utilizing RF-I and intelligent scheduling for better throughput/watt in a mobile GPU memory system. ACM Trans. Archit. Code Optim. 8 (4) (2012)
Kanit Therdsteerasukdi, Gyungsu Byun, Jeremy Ir, Glenn Reinman, Jason Cong, Mau-Chung Frank Chang
Utilizing Radio-Frequency Interconnect for a Many-DIMM DRAM System. IEEE J. Emerg. Sel. Topics Circuits Syst. 2 (2) (2012)
Yanghyo Kim, Sai-Wang Tam, Gyungsu Byun, Hao Wu, Lan Nan, Glenn Reinman, Jason Cong, Mau-Chung Frank Chang
Analysis of Noncoherent ASK Modulation-Based RF-Interconnect for Memory Interface. IEEE J. Emerg. Sel. Topics Circuits Syst. 2 (2) (2012)
Jason Cong, Mohammad Ali Ghodrat, Michael Gill, Beayna Grigorian, Glenn Reinman
CHARM: a composable heterogeneous accelerator-rich microprocessor. ISLPED (2012)
Jason Cong, Mohammad Ali Ghodrat, Michael Gill, Chunyue Liu, Glenn Reinman
BiN: a buffer-in-NUCA scheme for accelerator-rich CMPs. ISLPED (2012)
Yu-Ting Chen, Jason Cong, Hui Huang, Bin Liu, Chunyue Liu, Miodrag Potkonjak, Glenn Reinman
Dynamically reconfigurable hybrid cache: An energy-efficient last-level cache design. DATE (2012)
Mubbasir Kapadia, Shawn Singh, William Hewlett, Glenn Reinman, Petros Faloutsos
Parallelized egocentric fields for autonomous navigation. Vis. Comput. 28 (12) (2012)
Jason Cong, Mohammad Ali Ghodrat, Michael Gill, Beayna Grigorian, Glenn Reinman
Architecture support for accelerator-rich CMPs. DAC (2012)
Jason Cong, Mohammad Ali Ghodrat, Michael Gill, Hui Huang, Bin Liu, Raghu Prabhakar, Glenn Reinman, Marco Vitanza
Compilation and architecture support for customized vector instruction extension. ASP-DAC (2012)
Jason Cong, Glenn Reinman, Alex A. T. Bui, Vivek Sarkar
Customizable Domain-Specific Computing. IEEE Des. Test Comput. 28 (2) (2011)
Mubbasir Kapadia, Matthew Wang, Glenn Reinman, Petros Faloutsos
Improved Benchmarking for Steering Algorithms. MIG (2011)
Mubbasir Kapadia, Matthew Wang, Shawn Singh, Glenn Reinman, Petros Faloutsos
Scenario Space: Characterizing Coverage, Quality, and Failure of SteeringAlgorithms. Symposium on Computer Animation (2011)
Yu-Ting Chen, Jason Cong, Glenn Reinman
HC-Sim: a fast and exact l1 cache simulator with scratchpad memory co-simulation support. CODES+ISSS (2011)
Mubbasir Kapadia, Shawn Singh, Glenn Reinman, Petros Faloutsos
A Behavior-Authoring Framework for Multiactor Simulations. IEEE Computer Graphics and Applications 31 (6) (2011)
Jason Cong, Beayna Grigorian, Glenn Reinman, Marco Vitanza
Accelerating vision and navigation applications on a customizable platform. ASAP (2011)
Shawn Singh, Mubbasir Kapadia, William Hewlett, Glenn Reinman, Petros Faloutsos
A modular framework for adaptive agent-based steering. SI3D (2011)
Gyungsu Byun, Yanghyo Kim, Jongsun Kim, Sai-Wang Tam, Hsieh-Hung Hsieh, P.-Y. Wu, Chewnpu Jou, Jason Cong, Glenn Reinman, Mau-Chung Frank Chang
An 8.4Gb/s 2.5pJ/b mobile memory I/O interface using simultaneous bidirectional Dual (Base+RF) band signaling. ISSCC (2011)
Kanit Therdsteerasukdi, Gyungsu Byun, Jeremy Ir, Glenn Reinman, Jason Cong, M. Frank Chang
The DIMM tree architecture: A high bandwidth and scalable memory system. ICCD (2011)
Jason Cong, Karthik Gururaj, Hui Huang, Chunyue Liu, Glenn Reinman, Yi Zou
An energy-efficient adaptive hybrid cache. ISLPED (2011)
Shawn Singh, Mubbasir Kapadia, Glenn Reinman, Petros Faloutsos
Footstep navigation for dynamic crowds. Comput. Animat. Virtual Worlds 22 (2-3) (2011)
Shawn Singh, Mubbasir Kapadia, Glenn Reinman, Petros Faloutsos
Footstep navigation for dynamic crowds. SI3D (2011)
Mubbasir Kapadia, Shawn Singh, Glenn Reinman, Petros Faloutsos
Behavior authoring for crowd simulations. SI3D (2011)
Jason Cong, Chunyue Liu, Glenn Reinman
ACES: application-specific cycle elimination and splitting for deadlock-free routing on irregular network-on-chip. DAC (2010)
Jason Cong, Mau-Chung Frank Chang, Glenn Reinman, Sai-Wang Tam
Multiband RF-interconnect for reconfigurable network-on-chip communications. SLIP (2009)
Shawn Singh, Mubbasir Kapadia, Petros Faloutsos, Glenn Reinman
SteerBench: a benchmark suite for evaluating steering behaviors. Comput. Animat. Virtual Worlds 20 (5-6) (2009)
Shawn Singh, Mubbasir Kapadia, Petros Faloutsos, Glenn Reinman
An Open Framework for Developing, Evaluating, and Sharing Steering Algorithms. MIG (2009)
Mubbasir Kapadia, Shawn Singh, Brian F. Allen, Glenn Reinman, Petros Faloutsos
SteerBug: an interactive framework for specifying and detecting steering behaviors. Symposium on Computer Animation (2009)
Thomas Y. Yeh, Glenn Reinman, Sanjay J. Patel, Petros Faloutsos
Fool me twice: Exploring and exploiting error tolerance in physics-based animation. ACM Trans. Graph. 29 (1) (2009)
Suk-Bok Lee, Sai-Wang Tam, Ioannis Pefkianakis, Songwu Lu, M. Frank Chang, Chuanxiong Guo, Glenn Reinman, Chunyi Peng, Mishali Naik, Lixia Zhang, Jason Cong
A scalable micro wireless interconnect structure for CMPs. MobiCom (2009)
Yuchun Ma, Yongxiang Liu, Eren Kursun, Glenn Reinman, Jason Cong
Investigating the effects of fine-grain three-dimensional integration on microarchitecture design. ACM J. Emerg. Technol. Comput. Syst. 4 (4) (2008)
M.-C. Frank Chang, Eran Socher, Sai-Wang Tam, Jason Cong, Glenn Reinman
RF interconnects for communications on-chip. ISPD (2008)
Jason Cong, Karthik Gururaj, Guoling Han, Adam Kaplan, Mishali Naik, Glenn Reinman
MC-Sim: an efficient simulation tool for MPSoC designs. ICCAD (2008)
M.-C. Frank Chang, Jason Cong, Adam Kaplan, Chunyue Liu, Mishali Naik, Jagannath Premkumar, Glenn Reinman, Eran Socher, Sai-Wang Tam
Power reduction of CMP communication networks via RF-interconnects. MICRO (2008)
M. Frank Chang, Jason Cong, Adam Kaplan, Mishali Naik, Glenn Reinman, Eran Socher, Sai-Wang Tam
CMP network-on-chip overlaid with multi-band RF-interconnect. HPCA (2008)
Shawn Singh, Mishali Naik, Mubbasir Kapadia, Petros Faloutsos, Glenn Reinman
Watch Out! A Framework for Evaluating Steering Behaviors. MIG (2008)
Thomas Y. Yeh, Petros Faloutsos, Milos D. Ercegovac, Sanjay J. Patel, Glenn Reinman
The Art of Deception: Adaptive Precision Reduction for Area Efficient Physics Acceleration. MICRO (2007)
Jason Cong, Guoling Han, Ashok Jagannathan, Glenn Reinman, Krzysztof Rutkowski
Accelerating Sequential Applications on CMPs Using Core Spilling. IEEE Trans. Parallel Distributed Syst. 18 (8) (2007)
Vasily G. Moshnyaga, Hua Vo, Glenn Reinman, Miodrag Potkonjak
Reducing Energy of DRAM/Flash Memory System by OS-controlled Data Refresh. ISCAS (2007)
Thomas Y. Yeh, Petros Faloutsos, Sanjay J. Patel, Glenn Reinman
ParallAX: an architecture for real-time physics. ISCA (2007)
Yongxiang Liu, Yuchun Ma, Eren Kursun, Glenn Reinman, Jason Cong
Fine grain 3D integration for microarchitecture design through cube packing exploration. ICCD (2007)
Yuchun Ma, Zhuoyuan Li, Jason Cong, Xianlong Hong, Glenn Reinman, Sheqin Dong, Qiang Zhou
Micro-architecture Pipelining Optimization with Throughput-Aware Floorplanning. ASP-DAC (2007)
Jason Cong, Ashok Jagannathan, Yuchun Ma, Glenn Reinman, Jie Wei, Yan Zhang
An automated design flow for 3D microarchitecture evaluation. ASP-DAC (2006)
Eren Kursun, Anahita Shayesteh, Suleyman Sair, Timothy Sherwood, Glenn Reinman
An Evaluation of Deeply Decoupled Cores. J. Instr. Level Parallelism 8 (2006)
Anahita Shayesteh, Glenn Reinman, Norman P. Jouppi, Timothy Sherwood, Suleyman Sair
Improving the performance and power efficiency of shared helpers in CMPs. CASES (2006)
Vasily G. Moshnyaga, Hoa Vo, Glenn Reinman, Miodrag Potkonjak
Handheld System Energy Reduction by OS-Driven Refresh. PATMOS (2006)
Thomas Y. Yeh, Petros Faloutsos, Glenn Reinman
Enabling real-time physics simulation in future interactive entertainment. Sandbox@SIGGRAPH (2006)
Ashok Jagannathan, Hannah Honghua Yang, Kris Konigsfeld, Dan Milliron, Mosur Mohan, Michail Romesis, Glenn Reinman, Jason Cong
Microarchitecture evaluation with floorplanning and interconnect pipelining. ASP-DAC (2005)
Jason Cong, Yiping Fan, Guoling Han, Ashok Jagannathan, Glenn Reinman, Zhiru Zhang
Instruction set extension with shadow registers for configurable processors. FPGA (2005)
Thomas Y. Yeh, Glenn Reinman
Fast and fair: data-stream quality of service. CASES (2005)
Jason Cong, Ashok Jagannathan, Glenn Reinman, Yuval Tamir
Understanding the energy efficiency of SMT and CMP with multiclustering. ISLPED (2005)
Anahita Shayesteh, Glenn Reinman, Norman P. Jouppi, Suleyman Sair, Timothy Sherwood
Dynamically configurable shared CMP helper engines for improved performance. SIGARCH Comput. Archit. News 33 (4) (2005)
Anahita Shayesteh, Eren Kursun, Timothy Sherwood, Suleyman Sair, Glenn Reinman
Reducing the Latency and Area Cost of Core Swapping through Shared Helper Engines. ICCD (2005)
Yongxiang Liu, Gokhan Memik, Glenn Reinman
Reducing the Energy of Speculative Instruction Schedulers. ICCD (2005)
Gokhan Memik, Glenn Reinman, William H. Mangione-Smith
Precise Instruction Scheduling. J. Instr. Level Parallelism 7 (2005)
Yongxiang Liu, Anahita Shayesteh, Gokhan Memik, Glenn Reinman
Tornado warning: the perils of selective replay in multithreaded processors. ICS (2005)
Glenn Reinman, Brad Calder
Using a serial cache for energy efficient instruction fetching. J. Syst. Archit. 50 (11) (2004)
Eren Kursun, Glenn Reinman, Suleyman Sair, Anahita Shayesteh, Timothy Sherwood
Low-Overhead Core Swapping for Thermal Management. PACS (2004)
Yongxiang Liu, Anahita Shayesteh, Gokhan Memik, Glenn Reinman
Scaling the issue window with look-ahead latency prediction. ICS (2004)
Jason Cong, Ashok Jagannathan, Glenn Reinman, Michail Romesis
Microarchitecture evaluation with physical planning. DAC (2003)
Gokhan Memik, Glenn Reinman, William H. Mangione-Smith
Just Say No: Benefits of Early Cache Miss Determinatio. HPCA (2003)
Gokhan Memik, Glenn Reinman, William H. Mangione-Smith
Reducing energy and delay using efficient victim caches. ISLPED (2003)
Glenn Reinman, Brad Calder, Todd M. Austin
High Performance and Energy Efficient Serial Prefetch Architecture. ISHPC (2002)
Glenn Reinman, Brad Calder, Todd M. Austin
Optimizations Enabled by a Decoupled Front-End Architecture. IEEE Trans. Computers 50 (4) (2001)
Brad Calder, Glenn Reinman
A Comparative Survey of Load Speculation Architectures. J. Instr. Level Parallelism 2 (2000)
Glenn Reinman, Todd M. Austin, Brad Calder
A Scalable Front-End Architecture for Fast Instruction Delivery. ISCA (1999)
Brad Calder, Glenn Reinman, Dean M. Tullsen
Selective Value Prediction. ISCA (1999)
Glenn Reinman, Brad Calder, Dean M. Tullsen, Gary S. Tyson, Todd M. Austin
Classifying load and store instructions for memory renaming. International Conference on Supercomputing (1999)
Glenn Reinman, Brad Calder, Todd M. Austin
Fetch Directed Instruction Prefetching. MICRO (1999)
Glenn Reinman, Brad Calder
Predictive Techniques for Aggressive Load Speculation. MICRO (1998)