Sylvie Naudet

Publication Activity (10 Years)

Years Active: 2002-2017
Publications (10 Years): 5

Top Topics

Random Access Memory

Environmental Conditions

Advanced Technology

Top Venues

J. Electron. Test.

Publications

Souhir Mhira, Vincent Huard, Ahmed Benhassain, Florian Cacho, Sylvie Naudet, A. Jain, C. R. Parthasarathy, Alain Bravaix
Dynamic aging compensation and Safety measures in Automotive environment. IOLTS (2017)
Souhir Mhira, Vincent Huard, Ahmed Benhassain, Florian Cacho, David Meyer, Sylvie Naudet, A. Jain, C. R. Parthasarathy, Alain Bravaix
Cognitive approach to support dynamic aging compensation. ITC (2017)
Rossella Ranica, Nicolas Planes, Vincent Huard, Olivier Weber, D. Noblet, Damien Croain, Fabien Giner, Sylvie Naudet, P. Mergault, S. Ibars, A. Villaret, M. Parra, Sébastien Haendler, M. Quoirin, Florian Cacho, C. Julien, F. Terrier, Lorenzo Ciampolini, David Turgis, Christophe Lecocq, Franck Arnaud
28nm FDSOI technology sub-0.6V SRAM Vmin assessment for ultra low voltage applications. VLSI Circuits (2016)
Kapil Juneja, Darayus Adil Patel, Rajesh Kumar Immadi, Balwant Singh, Sylvie Naudet, Pankaj Agarwal, Arnaud Virazel, Patrick Girard
An Effective Power-Aware At-Speed Test Methodology for IP Qualification and Characterization. J. Electron. Test. 32 (6) (2016)
Deepak-Kumar Arora, Darayus Adil Patel, Shahabuddin, Sanjay Kumar, Navin Kumar Dayani, Balwant Singh, Sylvie Naudet, Arnaud Virazel, Alberto Bosio
Analysis of setup and hold margins inside silicon for advanced technology nodes. ISQED (2016)
Sylvain Clerc, Fady Abouzeid, Darayus Adil Patel, Jean-Marc Daveau, Cyril Bottoni, Lorenzo Ciampolini, Fabien Giner, David Meyer, Robin Wilson, Philippe Roche, Sylvie Naudet, Arnaud Virazel, Alberto Bosio, Patrick Girard
Design and performance parameters of an ultra-low voltage, single supply 32bit processor implemented in 28nm FDSOI technology. ISQED (2015)
Steve Bourgeois, Hanna Martinsson, Quoc Cuong Pham, Sylvie Naudet
A Practical Guide to Marker Based and Hybrid Visual Registration for AR Industrial Applications. CAIP (2005)
Thierry Devoivre, M. Lunenborg, C. Julien, J.-P. Carrere, P. Ferreira, W. J. Toren, A. VandeGoor, P. Gayet, T. Berger, O. Hinsinger, P. Vannier, Y. Trouiller, Y. Rody, P.-J. Goirand, R. Palla, I. Thomas, F. Guyader, David Roy, B. Borot, Nicolas Planes, Sylvie Naudet, F. Pico, D. Duca, F. Lalanne, D. Heslinga, M. Haond
Validated 90nm CMOS Technology Platform with Low-k Copper Interconnects for Advanced System-on-Chip (SoC). MTDT (2002)