Song Chen

ORCID

Publication Activity (10 Years)

Years Active: 2003-2024
Publications (10 Years): 83

Top Venues

CoRR

Integr.

ACM Trans. Design Autom. Electr. Syst.

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.

Publications

Bo Yang, Qi Xu, Hao Geng, Song Chen, Bei Yu, Yi Kang
Floorplanning with Edge-aware Graph Attention Network and Hindsight Experience Replay. ACM Trans. Design Autom. Electr. Syst. 29 (3) (2024)
Haodong Han, Junpeng Wang, Bo Ding, Song Chen
ILP-based Multi-Branch CNNs Mapping on Processing-in-Memory Architecture. AICAS (2024)
Junpeng Wang, Mengke Ge, Bo Ding, Qi Xu, Song Chen, Yi Kang
NicePIM: Design Space Exploration for Processing-In-Memory DNN Accelerators With 3-D Stacked-DRAM. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43 (5) (2024)
Wendi Sun, Wenhao Sun, Yifan Wang, Yi Kang, Song Chen
Communication Minimized Model-Architecture Co-design for Efficient Convolution Acceleration. ACM Great Lakes Symposium on VLSI (2024)
Mengke Ge, Junpeng Wang, Binhan Chen, Yingjian Zhong, Haitao Du, Song Chen, Yi Kang
Allspark: Workload Orchestration for Visual Transformers on Processing In-Memory Systems. CoRR (2024)
Bo Yang, Qi Xu, Hao Geng, Song Chen, Yi Kang
Miracle: Multi-Action Reinforcement Learning-Based Chip Floorplanning Reasoner. DATE (2024)
Wenhao Sun, Zhiwei Zou, Deng Liu, Wendi Sun, Song Chen, Yi Kang
Bit-Balance: Model-Hardware Codesign for Accelerating NNs by Exploiting Bit-Level Sparsity. IEEE Trans. Computers 73 (1) (2024)
Haitao Du, Yuhan Qin, Song Chen, Yi Kang
FASA-DRAM: Reducing DRAM Latency with Destructive Activation and Delayed Restoration. ACM Trans. Archit. Code Optim. 21 (2) (2024)
Yongtian Bi, Qi Xu, Hao Geng, Song Chen, Yi Kang
VNCS: Adversarial Defense and Device Variation-tolerance in Memristive Crossbar-based Neuromorphic Computing Systems. ACM Trans. Design Autom. Electr. Syst. 29 (1) (2024)
Qi Xu, Lijie Wang, Jing Wang, Lin Cheng, Song Chen, Yi Kang
Graph Attention-Based Symmetry Constraint Extraction for Analog Circuits. IEEE Trans. Circuits Syst. I Regul. Pap. 71 (8) (2024)
Ziyi Wang, Siting Liu, Yuan Pu, Song Chen, Tsung-Yi Ho, Bei Yu
Restructure-Tolerant Timing Prediction via Multimodal Fusion. DAC (2023)
Junpeng Wang, Haitao Du, Bo Ding, Qi Xu, Song Chen, Yi Kang
DDAM: Data Distribution-Aware Mapping of CNNs on Processing-In-Memory Systems. ACM Trans. Design Autom. Electr. Syst. 28 (3) (2023)
Wenbing Fang, Zihao Xuan, Song Chen, Yi Kang
An 1.38nJ/Inference Clock-Free Mixed-Signal Neuromorphic Architecture Using ReL-PSP Function and Computing-in-Memory. BioCAS (2023)
Shahzad Haider, Ke Hu, Song Chen
Fine-Grained Transistor-Level QDI Asynchronous Crossbar Switch. SOCC (2023)
Xiaobing Ni, Mengke Ge, Yongjin Tao, Wendi Sun, Feixiang Duan, Xuefei Bai, Qi Xu, Song Chen, Yi Kang
BusMap: Application Mapping With Bus Routing for Coarse-Grained Reconfigurable Array. IEEE Trans. Circuits Syst. II Express Briefs 70 (8) (2023)
Bo Ding, Jinglei Huang, Qi Xu, Junpeng Wang, Song Chen, Yi Kang
Memory-aware Partitioning, Scheduling, and Floorplanning for Partially Dynamically Reconfigurable Systems. ACM Trans. Design Autom. Electr. Syst. 28 (1) (2023)
Bin Zhang, Haitao Du, Song Chen, Yi Kang
GGPA: A General Graph Processing Architecture with Flexible Execution Paradigm. CF (2023)
Zihao Xuan, Song Chen, Yi Kang
AiDAC: A Low-Cost In-Memory Computing Architecture with All-Analog Multi-Bit Compute and Interconnect. CoRR (2023)
Yongtian Bi, Qi Xu, Hao Geng, Song Chen, Yi Kang
Resist: Robust Network Training for Memristive Crossbar-Based Neuromorphic Computing Systems. IEEE Trans. Circuits Syst. II Express Briefs 70 (6) (2023)
Bo Ding, Jinglei Huang, Junpeng Wang, Qi Xu, Song Chen, Yi Kang
Task Modules Partitioning, Scheduling and Floorplanning for Partially Dynamically Reconfigurable Systems with Heterogeneous Resources. ACM Trans. Design Autom. Electr. Syst. 28 (6) (2023)
Shahzad Haider, Song Chen
Granular Transistor-Level Approaches for QDI Asynchronous Crossbar Switches. MWSCAS (2023)
Zetao Guo, Junpeng Wang, Song Chen, Yi Kang
A Lightweight Stereo Matching Neural Network Based on Depthwise Separable Convolution. ICTA (2023)
Wenhao Sun, Wendi Sun, Song Chen, Yi Kang
IOPS: An Unified SpMM Accelerator Based on Inner-Outer-Hybrid Product. CoRR (2023)
Junpeng Wang, Mengke Ge, Bo Ding, Qi Xu, Song Chen, Yi Kang
NicePIM: Design Space Exploration for Processing-In-Memory DNN Accelerators with 3D-Stacked-DRAM. CoRR (2023)
Shahzad Haider, Junhao Liang, Song Chen
Efficient Transistor-Level QDI Asynchronous Switch for Neuromorphic Systems. NEWCAS (2023)
Xiaobing Ni, Jiaheng Ruan, Mengke Ge, Wendi Sun, Song Chen, Yi Kang
BandMap: Application Mapping with Bandwidth Allocation forCoarse-Grained Reconfigurable Array. CoRR (2023)
Wenhao Sun, Deng Liu, Zhiwei Zou, Wendi Sun, Song Chen, Yi Kang
Sense: Model-Hardware Codesign for Accelerating Sparse CNNs on Systolic Arrays. IEEE Trans. Very Large Scale Integr. Syst. 31 (4) (2023)
Wenhao Sun, Zhiwei Zou, Deng Liu, Wendi Sun, Song Chen, Yi Kang
Bit-balance: Model-Hardware Co-design for Accelerating NNs by Exploiting Bit-level Sparsity. CoRR (2023)
Yifan Song, Shunpeng Zhao, Song Chen, Yi Kang
SAUST: A Scheme for Acceleration of Unstructured Sparse Transformer. ICTA (2022)
Wenhao Sun, Deng Liu, Zhiwei Zou, Wendi Sun, Junpeng Wang, Yi Kang, Song Chen
Sense: Model Hardware Co-design for Accelerating Sparse Neural Networks. CoRR (2022)
Bo Ding, Jinglei Huang, Junpeng Wang, Qi Xu, Song Chen, Yi Kang
Task modules Partitioning, Scheduling and Floorplanning for Partially Dynamically Reconfigurable Systems Based on Modern Heterogeneous FPGAs. CoRR (2022)
Bin Zhang, Haitao Du, Song Chen, Yi Kang
PCFBCD: An Innovative Approach to Accelerating Collaborative Filtering. ISCAS (2022)
Yuan Li, Qiaojun Wu, Song Chen, Yi Kang
Multi-scale Lightweight Neural Network for Real-Time Object Detection. PRICAI (3) (2022)
Zhimin Lu, Jue Wang, Zhiwei Li, Song Chen, Feng Wu
A Resource-Efficient Pipelined Architecture for Real-Time Semi-Global Stereo Matching. IEEE Trans. Circuits Syst. Video Technol. 32 (2) (2022)
Mengke Ge, Xiaobing Ni, Qi Xu, Song Chen, Jinglei Huang, Yi Kang, Feng Wu
Synthesizing Brain-network-inspired Interconnections for Large-scale Network-on-chips. ACM Trans. Design Autom. Electr. Syst. 27 (1) (2022)
Qi Xu, Hao Geng, Tianming Ni, Song Chen, Bei Yu, Yi Kang, Xiaoqing Wen
Fortune: A New Fault-Tolerance TSV Configuration in Router-Based Redundancy Structure. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41 (10) (2022)
Ke Hu, Wenhao Sun, Zhongbo Nie, Ran Cheng, Song Chen, Yi Kang
Real-time infrared small target detection network and accelerator design. Integr. 87 (2022)
Mengke Ge, Xiaobing Ni, Song Chen, Yi Kang
Generating Brain-Network-Inspired Topologies for Large-Scale NoCs on Monolithic 3D ICs. IEEE Trans. Circuits Syst. II Express Briefs 69 (3) (2022)
Qi Xu, Hao Geng, Song Chen, Bo Yuan, Cheng Zhuo, Yi Kang, Xiaoqing Wen
GoodFloorplan: Graph Convolutional Network and Reinforcement Learning-Based Floorplanning. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41 (10) (2022)
Qi Xu, Wenhao Sun, Song Chen, Yi Kang, Xiaoqing Wen
Cellular Structure-Based Fault-Tolerance TSV Configuration in 3D-IC. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41 (5) (2022)
Mengke Ge, Xiaobing Ni, Qi Xu, Song Chen, Jinglei Huang, Yi Kang, Feng Wu
Synthesizing Brain-Network-Inspired Interconnections for Large-Scale Network-on-Chips. CoRR (2021)
Lei Ding, Haitao Du, Song Chen, Yi Kang
A Low-latency NoC Router Priority Scheme for BFS algorithm. ICTA (2021)
Qi Xu, Junpeng Wang, Hao Geng, Song Chen, Xiaoqing Wen
Reliability-Driven Neuromorphic Computing Systems Design. DATE (2021)
Shahzad Haider, Song Chen
Effects of using Multi Voltage Threshold Transistors in Asynchronous Circuits. ASICON (2021)
Mingjian Sun, Yuan Li, Song Chen, Yi Kang
A Low Power Branch Prediction for Deep Learning on RISC-V Processor. ASAP (2021)
Qiqiao Wu, Wenhao Sun, Junpeng Wang, Xuefei Bai, Feng Zhang, Song Chen, Yi Kang
A Non-volatile Computing-in-Memory ReRAM Macro using Two-bit Current-Mode Sensing Amplifier. NVMSA (2021)
Song Chen, Mengke Ge, Zhigang Li, Jinglei Huang, Qi Xu, Feng Wu
Generalized Fault-Tolerance Topology Generation for Application-Specific Network-on-Chips. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39 (6) (2020)
Qi Xu, Song Chen, Hao Geng, Bo Yuan, Bei Yu, Feng Wu, Zhengfeng Huang
Fault tolerance in memristive crossbar-based neuromorphic computing systems. Integr. 70 (2020)
Junpeng Wang, Qi Xu, Bo Yuan, Song Chen, Bei Yu, Feng Wu
Reliability-Driven Neural Network Training for Memristive Crossbar-Based Neuromorphic Computing Systems. ISCAS (2020)
Yuting Wu, Bo Ding, Qi Xu, Song Chen
Fault-Tolerant-Driven Clustering for Large Scale Neuromorphic Computing Systems. AICAS (2020)
Xun Yuan, Ke Hu, Song Chen
Realtime CNN-based Keypoint Detector with Sobel Filter and CNN-based Descriptor Trained with Keypoint Candidates. CoRR (2020)
Song Chen, Jinglei Huang, Xiaodong Xu, Bo Ding, Qi Xu
Integrated Optimization of Partitioning, Scheduling, and Floorplanning for Partially Dynamically Reconfigurable Systems. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39 (1) (2020)
Xun Yuan, Song Chen
SaD-SLAM: A Visual SLAM Based on Semantic and Depth Information. IROS (2020)
Mengke Ge, Qi Xu, Huajie Ruan, Xiaobing Ni, Song Chen, Yi Kang
Synthesizing A Generalized Brain-inspired Interconnection Network for Large-scale Network-on-chip Systems. ACM Great Lakes Symposium on VLSI (2020)
Qi Xu, Hao Geng, Song Chen, Bei Yu, Feng Wu
Memristive Crossbar Mapping for Neuromorphic Computing Systems on 3D IC. ACM Trans. Design Autom. Electr. Syst. 25 (1) (2020)
Tianzhi Xue, Baicheng Liu, Wenhao Sun, Song Chen, Yi Kang, Feng Wu
Customizing CMOS/ReRAM Hybrid Hardware Architecture for Spiking CNN. ASICON (2019)
Yan Li, Zhiwei Li, Chen Yang, Wei Zhong, Song Chen
High throughput hardware architecture for accurate semi-global matching. Integr. 65 (2019)
Jinglei Huang, Xiaodong Xu, Nan Wang, Song Chen
Reconfigurable topology synthesis for application-specific NoC on partially dynamically reconfigurable systems. Integr. 65 (2019)
Song Chen, Mengke Ge, Zhigang Li, Jinglei Huang, Qi Xu, Feng Wu
Generalized Fault-Tolerance Topology Generation for Application Specific Network-on-Chips. CoRR (2019)
Jue Wang, Zhiwei Li, Lan Yao, Song Chen, Feng Wu
Low-Resource Hardware Architecture for Semi-Global Stereo Matching. ISCAS (2019)
Song Chen, Qi Xu, Bei Yu
Adaptive 3D-IC TSV Fault Tolerance Structure Generation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38 (5) (2019)
Baicheng Liu, Song Chen, Yi Kang, Feng Wu
An Energy-Efficient Systolic Pipeline Architecture for Binary Convolutional Neural Network. ASICON (2019)
Nan Wang, Song Chen, Zhiyuan Ma, Xiaofeng Ling, Yu Zhu
Integrating operation scheduling and binding for functional unit power-gating in high-level synthesis. Integr. 65 (2019)
Qi Xu, Song Chen, Bei Yu, Feng Wu
Memristive Crossbar Mapping for Neuromorphic Computing Systems on 3D IC. ACM Great Lakes Symposium on VLSI (2018)
Jinglei Huang, Wei Zhong, Zhigang Li, Song Chen
Lagrangian relaxation-based routing path allocation for application-specific network-on-chips. Integr. 61 (2018)
Nan Wang, Manting Yao, Dongxu Jiang, Song Chen, Yu Zhu
Security-Driven Task Scheduling for Multiprocessor System-on-Chips with Performance Constraints. ISVLSI (2018)
Song Chen, Qi Xu, Bei Yu
Adaptive 3D-IC TSV Fault Tolerance Structure Generation. CoRR (2018)
Nan Wang, Song Chen, Jianmo Ni, Xiaofeng Ling, Yu Zhu
Security-Aware Task Scheduling Using Untrusted Components in High-Level Synthesis. IEEE Access 6 (2018)
Nan Wang, Wei Zhong, Song Chen, Zhiyuan Ma, Xiaofeng Ling, Yu Zhu
Power-gating-aware scheduling with effective hardware resources optimization. Integr. 61 (2018)
Song Chen, Jinglei Huang, Xiaodong Xu, Qi Xu
Integrated Optimization of Partitioning, Scheduling and Floorplanning for Partially Dynamically Reconfigurable Systems. CoRR (2018)
Qi Xu, Song Chen
Fast thermal analysis for fixed-outline 3D floorplanning. Integr. 59 (2017)
Gan Feng, Lan Yao, Song Chen
AutoNFT: Architecture synthesis for hardware DFT of length-of-coprime-number products. Integr. 58 (2017)
Mengting Li, Wenhao Sun, Zhimin Lu, Song Chen, Feng Wu
Memristor-based material implication logic design for full adders. ASICON (2017)
Jinglei Huang, Xiaodong Xu, Lan Yao, Song Chen
Reconfigurable topology synthesis for application-specific noc on partially dynamically reconfigurable FPGAs. SLIP (2017)
Zhiwei Li, Yan Li, Song Chen, Feng Wu
A fully pipelined hardware architecture for convolutional neural network with low memory usage and DRAM bandwidth. ASICON (2017)
Qi Xu, Song Chen, Xiaodong Xu, Bei Yu
Clustered Fault Tolerance TSV Planning for 3-D Integrated Circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 36 (8) (2017)
Xiaodong Xu, Qi Xu, Jinglei Huang, Song Chen
An Integrated Optimization Framework for Partitioning, Scheduling and Floorplanning on Partially Dynamically Reconfigurable FPGAs. ACM Great Lakes Symposium on VLSI (2017)
Zhigang Li, Jinglei Huang, Qi Xu, Song Chen
Integer linear programming based fault-tolerant topology synthesis for application-specific NoC. ASICON (2017)
Yan Li, Chen Yang, Wei Zhong, Zhiwei Li, Song Chen
High throughput hardware architecture for accurate semi-global matching. ASP-DAC (2017)
Nan Wang, Wei Zhong, Cong Hao, Song Chen, Takeshi Yoshimura, Yu Zhu
Leakage-Power-Aware Scheduling With Dual-Threshold Voltage Design. IEEE Trans. Very Large Scale Integr. Syst. 24 (10) (2016)
Jinglei Huang, Song Chen, Wei Zhong, Wenchao Zhang, Shengxi Diao, Fujiang Lin
Floorplanning and Topology Synthesis for Application-Specific Network-on-Chips with RF-Interconnect. ACM Trans. Design Autom. Electr. Syst. 21 (3) (2016)
Qi Xu, Song Chen, Bin Li
Combining the ant system algorithm and simulated annealing for 3D/2D fixed-outline floorplanning. Appl. Soft Comput. 40 (2016)
Chen Yang, Yan Li, Wei Zhong, Song Chen
Real-Time Hardware Stereo Matching Using Guided Image Filter. ACM Great Lakes Symposium on VLSI (2016)
Wenchao Zhang, Song Chen, Xuefei Bai, Dajiang Zhou
A full layer parallel QC-LDPC decoder for WiMAX and Wi-Fi. ASICON (2015)
Zhen Meng, Song Chen, Lu Huang
Irregularly shaped voltage islands generation with hazard and heal strategy. ISQED (2015)
Jinglei Huang, Zhigang Li, Wei Zhong, Song Chen
Lagrangian relaxation based topology synthesis for Application-Specific Network-on-Chips. ASICON (2015)
Nan Wang, Song Chen, Cong Hao, Haoran Zhang, Takeshi Yoshimura
Leakage Power Aware Scheduling in High-Level Synthesis. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (4) (2014)
Bei Yu, Sheqin Dong, Song Chen, Satoshi Goto
Voltage and Level-Shifter Assignment Driven Floorplanning. CoRR (2014)
Bei Yu, Sheqin Dong, Song Chen, Satoshi Goto
Floorplanning and Topology Generation for Application-Specific Network-on-Chip. CoRR (2014)
Bei Yu, Sheqin Dong, Yuchun Ma, Tao Lin, Yu Wang, Song Chen, Satoshi Goto
Network flow-based simultaneous retiming and slack budgeting for low power design. CoRR (2014)
Nan Wang, Song Chen, Wei Zhong, Nan Liu, Takeshi Yoshimura
Mobility Overlap-Removal-Based Leakage Power and Register-Aware Scheduling in High-Level Synthesis. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (8) (2014)
Nan Wang, Song Chen, Yuhuan Sun, Takeshi Yoshimura
Mobility overlap-removal based leakage power aware scheduling in high-level synthesis. ISCAS (2013)
Cong Hao, Nan Wang, Song Chen, Takeshi Yoshimura, Min-You Wu
Interconnection allocation between functional units and registers in High-Level Synthesis. ASICON (2013)
Haoran Zhang, Cong Hao, Nan Wang, Song Chen, Takeshi Yoshimura
Power and resource aware scheduling with multiple voltages. ASICON (2013)
Wei Zhong, Song Chen, Yang Geng, Takeshi Yoshimura
Lagrangian relaxation based pin assignment and Through-Silicon Via planning for 3-D SoCs. ASICON (2013)
Nan Wang, Song Chen, Takeshi Yoshimura
Min-cut based leakage power aware scheduling in high-level synthesis. ISQED (2013)
Nan Liu, Song Chen, Takeshi Yoshimura
Resource-Aware Multi-Layer Floorplanning for Partially Reconfigurable FPGAs. IEICE Trans. Electron. (4) (2013)
Wei Zhong, Song Chen, Bo Huang, Takeshi Yoshimura, Satoshi Goto
Floorplanning and Topology Synthesis for Application-Specific Network-on-Chips. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (6) (2013)
Cong Hao, Song Chen, Takeshi Yoshimura
Network simplex method based Multiple Voltage Scheduling in Power-efficient High-level synthesis. ASP-DAC (2013)
Jianchang Ao, Sheqin Dong, Song Chen, Satoshi Goto
Delay-driven layer assignment in global routing under multi-tier interconnect structure. ISPD (2013)

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Publication Activity (10 Years)

Top Topics

Top Venues

Song Chen