Rochit Rajsuman

Publication Activity (10 Years)

Years Active: 1987-2006
Publications (10 Years): 0

Publications

Rochit Rajsuman
Innovation In Test: Where Are We. DELTA (2006)
Sunil R. Das, Rochit Rajsuman
Guest Editorial Second Special Section of the IEEE Transactions on Instrumentation and Measurement in the Area of VLSI Testing - Future of Semiconductor Test. IEEE Trans. Instrum. Meas. 55 (2) (2006)
Rochit Rajsuman
Towards The Methodology of On-line Diagnosis. IOLTS (2006)
Rochit Rajsuman, Masuda Noriyuki, Kazuhiro Yamashita
Architecture and design of an open ATE to incubate the development of third-party instruments. IEEE Trans. Instrum. Meas. 54 (5) (2005)
Sunil R. Das, Rochit Rajsuman
Guest Editorial First Special Section of the IEEE TRANSACTIONS ON INSTRUMENTATION AND MEASUREMENT in the Area of VLSI Testing - Future of Semiconductor Test. IEEE Trans. Instrum. Meas. 54 (5) (2005)
Kazumi Hatayama, Rochit Rajsuman
Opportunities with the open architecture test system. ASP-DAC (2004)
Rochit Rajsuman
An Overview of the Open Architecture Test System. DELTA (2004)
Rochit Rajsuman, Masuda Noriyuki
Open Architecture Test System: System Architecture and Design. ITC (2004)
Rochit Rajsuman
New opportunities with the open architecture test system. ASP-DAC (2004)
Rochit Rajsuman
Architecture, design, and application of an event-based test system. IEEE Trans. Instrum. Meas. 52 (5) (2003)
Sunil R. Das, Rochit Rajsuman
Guest editorial [Special section on innovations in VLSI automatic test equipment (ATEs)]. IEEE Trans. Instrum. Meas. 52 (5) (2003)
Rochit Rajsuman
Testing The Tester. ITC (2002)
Rochit Rajsuman
Extending EDA Environment From Design to Test. Asian Test Symposium (2002)
Rochit Rajsuman
Can IC Test Learn from How a Tester is Tested. ITC (2002)
Rochit Rajsuman
Testing The Tester. ITC (2002)
Rochit Rajsuman
Design and Test of Large Embedded Memories: An Overview. IEEE Des. Test Comput. 18 (3) (2001)
Roderick McConnell, Rochit Rajsuman, Eric A. Nelson, Jeffrey H. Dreibelbis
Test and repair of large embedded DRAMs. I. ITC (2001)
Rochit Rajsuman, Francky Catthoor
Guest Editors' Intoduction: The New World of Large Embedded Memories. IEEE Des. Test Comput. 18 (3) (2001)
Rochit Rajsuman
Iddq testing for CMOS VLSI. Proc. IEEE 88 (4) (2000)
Jerry Katz, Rochit Rajsuman
A new paradigm in test for the next millennium. ITC (2000)
Rochit Rajsuman
Testing a system-on-a-chip with embedded microprocessor. ITC (1999)
Suntae Hwang, Rochit Rajsuman
VLSI Testing for High Reliability: Mixing IDDQ Testing With Logic Testing. VLSI Design 5 (3) (1997)
Rochit Rajsuman
Based ASICs. ITC (1996)
Sankaran M. Menon, Yashwant K. Malaiya, Anura P. Jayasumana, Rochit Rajsuman
Testable design of BiCMOS circuits for stuck-open fault detection using single patterns. IEEE J. Solid State Circuits 30 (8) (1995)
Rochit Rajsuman
A new testing method for EEPLA. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 13 (7) (1994)
Rochit Rajsuman, Kamal Rajkanan
STD Architecture: A Practical Approach to Test M-Bits Random Access Memories. VLSI Design 1 (4) (1994)
S. Hwang, Rochit Rajsuman, Scott Davidson
Detection of CMOS Bridging Faults by Stuck-At Fault Tests. VLSI Design (1994)
Rochit Rajsuman
Special Issue on Digital Hardware Testing. VLSI Design 1 (4) (1994)
Rochit Rajsuman, David A. Penry
Test Environment. VLSI Design (1993)
David A. Vasko, Rochit Rajsuman
An analysis and simulation of multiple ring token networks. LCN (1992)
Rochit Rajsuman
An Architecture To Test Random Access Memories. VLSI Design (1992)
Rochit Rajsuman, Anura P. Jayasumana, Yashwant K. Malaiya, Juney Park
An analysis and testing of operation induced faults in MOS VLSI. VTS (1991)
Rochit Rajsuman
An analysis of feedback bridging faults in MOS VLSI. VTS (1991)
S. Hwang, Rochit Rajsuman, Yashwant K. Malaiya
On the testing of microprogrammed processor. MICRO (1990)
Rochit Rajsuman, Yashwant K. Malaiya, Anura P. Jayasumana
Limitations of switch level analysis for bridging faults. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 8 (7) (1989)
Rochit Rajsuman, Anura P. Jayasumana, Yashwant K. Malaiya
CMOS Stuck-open Fault Detection Using Single Test Patterns. DAC (1989)
Rochit Rajsuman, Yashwant K. Malaiya, Anura P. Jayasumana
On Accuracy of Switch-Level Modeling of Bridging Faults in Complex Gates. DAC (1987)