Hanwool Jeong

Publication Activity (10 Years)

Years Active: 2012-2024
Publications (10 Years): 23

Top Topics

Energy Efficient

Magnetic Recording

Top Venues

IEEE Trans. Very Large Scale Integr. Syst.

IEEE Trans. Circuits Syst. I Regul. Pap.

IEEE Trans. Circuits Syst. II Express Briefs

IEEE J. Solid State Circuits

Publications

Sangheon Lee, Gwanwoo Park, Hanwool Jeong
Design of High-Speed, Low-Power Sensing Circuits for Nano-Scale Embedded Memory. Sensors 24 (1) (2024)
Inseong Jeon, Hyunho Park, Taehwan Yoon, Hanwool Jeong
High Efficiency Variation-Aware SRAM Timing Characterization via Machine-Learning-Assisted Netlist Extraction. IEEE Trans. Circuits Syst. II Express Briefs 71 (3) (2024)
Sangheon Lee, Jaehyun Park, Hanwool Jeong
Cross-Coupled nFET Preamplifier for Low Voltage SRAM. IEEE Trans. Circuits Syst. II Express Briefs 70 (9) (2023)
Jihwan Park, Hanwool Jeong
Energy-Efficient Wide-Range Level Shifter With a Logic Error Detection Circuit. IEEE Trans. Very Large Scale Integr. Syst. 31 (5) (2023)
Jaehyun Park, Sangheon Lee, Hanwool Jeong
Voltage Boosted Fail Detecting Circuit for Selective Write Assist and Cell Current Boosting for High-Density Low-Power SRAM. IEEE Trans. Circuits Syst. I Regul. Pap. 70 (2) (2023)
Taehwan Yoon, Hanwool Jeong
Machine Learning-Based Read Access Yield Estimation and Design Optimization for High-Density SRAM. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42 (8) (2023)
Junseo Lee, Jihwan Park, Seokhun Kim, Hanwool Jeong
Bayesian Learning Automated SRAM Circuit Design for Power and Performance Optimization. IEEE Trans. Circuits Syst. I Regul. Pap. 70 (12) (2023)
Hyunho Park, Hanwool Jeong
Self-Shut-Off Pulsed Latches for Minimizing Sequencing Overhead. IEEE Trans. Very Large Scale Integr. Syst. 30 (11) (2022)
Gidong Baek, Hanwool Jeong
All-Digital Time-Domain Temperature Sensor for Energy Efficient On-Chip Thermal Management. ICEIC (2022)
Gidong Baek, Hanwool Jeong
High-Density SRAM Read Access Yield Estimation Methodology. IEEE Access 9 (2021)
Hanwool Jeong, Tae Hyun Kim, Changnam Park, Hoonki Kim, Taejoong Song, Seong-Ook Jung
A Wide-Range Static Current-Free Current Mirror-Based LS With Logic Error Detection for Near-Threshold Operation. IEEE J. Solid State Circuits 56 (2) (2021)
Tae Hyun Kim, Hanwool Jeong, Juhyun Park, Hoonki Kim, Taejoong Song, Seong-Ook Jung
An Embedded Level-Shifting Dual-Rail SRAM for High-Speed and Low-Power Cache. IEEE Access 8 (2020)
Hanwool Jeong, Se Hyeok Oh, Tae Woo Oh, Hoonki Kim, Changnam Park, Woojin Rim, Taejoong Song, Seong-Ook Jung
Bitline Charge-Recycling SRAM Write Assist Circuitry for $V_{\mathrm{MIN}}$ Improvement and Energy Saving. IEEE J. Solid State Circuits 54 (3) (2019)
Hanwool Jeong, Juhyun Park, Seung Chul Song, Seong-Ook Jung
Self-Timed Pulsed Latch for Low-Voltage Operation With Reduced Hold Time. IEEE J. Solid State Circuits 54 (8) (2019)
Inhak Lee, Hanwool Jeong, Sangyeop Baeck, Siddharth Gupta, Changnam Park, Dongwook Seo, Jaeseung Choi, Jaeyoung Kim, Hoon Kim, Jungmyung Kang, Sunyung Jang, Daeyoung Moon, Sangshin Han, Taehyung Kim, Jaehyun Lim, Younghwan Park, Hyejin Hwang, Jeonseung Kang, Taejoong Song
A Voltage and Temperature Tracking SRAM Assist Supporting 740mV Dual-Rail Offset for Low-Power and High-Performance Applications in 7nm EUV FinFET Technology. ISSCC (2019)
Hanwool Jeong, Tae Woo Oh, Seung Chul Song, Seong-Ook Jung
Sense-Amplifier-Based Flip-Flop With Transition Completion Detection for Low-Voltage Operation. IEEE Trans. Very Large Scale Integr. Syst. 26 (4) (2018)
Tae Woo Oh, Hanwool Jeong, Kyoman Kang, Juhyun Park, Younghwi Yang, Seong-Ook Jung
Power-Gated 9T SRAM Cell for Low-Energy Operation. IEEE Trans. Very Large Scale Integr. Syst. 25 (3) (2017)
Tae Woo Oh, Hanwool Jeong, Juhyun Park, Seong-Ook Jung
Pre-Charged Local Bit-Line Sharing SRAM Architecture for Near-Threshold Operation. IEEE Trans. Circuits Syst. I Regul. Pap. (10) (2017)
Tae Hoon Choi, Hanwool Jeong, Younghwi Yang, Juhyun Park, Seong-Ook Jung
SRAM Operational Mismatch Corner Model for Efficient Circuit Design and Yield Analysis. IEEE Trans. Circuits Syst. I Regul. Pap. (8) (2017)
Kyoman Kang, Hanwool Jeong, Younghwi Yang, Juhyun Park, Ki-Ryong Kim, Seong-Ook Jung
Full-Swing Local Bitline SRAM Architecture Based on the 22-nm FinFET Technology for Low-Voltage Operation. IEEE Trans. Very Large Scale Integr. Syst. 24 (4) (2016)
Hanwool Jeong, Juhyun Park, Tae Woo Oh, Woojin Rim, Taejoong Song, Gyu-Hong Kim, Hyo-Sig Won, Seong-Ook Jung
Bitline Precharging and Preamplifying Switching pMOS for High-Speed Low-Power SRAM. IEEE Trans. Circuits Syst. II Express Briefs (11) (2016)
Ki-Ryong Kim, Hanwool Jeong, Juhyun Park, Seong-Ook Jung
Transient Cell Supply Voltage Collapse Write Assist Using Charge Redistribution. IEEE Trans. Circuits Syst. II Express Briefs (10) (2016)
Younghwi Yang, Hanwool Jeong, Seung Chul Song, Joseph Wang, Geoffrey Yeap, Seong-Ook Jung
Single Bit-Line 7T SRAM Cell for Near-Threshold Voltage Operation With Enhanced Performance and Energy in 14 nm FinFET Technology. IEEE Trans. Circuits Syst. I Regul. Pap. (7) (2016)
Taehui Na, Hanwool Jeong, Seong-Ook Jung, Jung Pill Kim, Seung-Hyuk Kang
Efficiency analysis of importance sampling in deep submicron STT-RAM design using uncontrollable industry-compatible model parameter. ICECS (2015)
Hanwool Jeong, Taewon Kim, Younghwi Yang, Taejoong Song, Gyu-Hong Kim, Hyo-Sig Won, Seong-Ook Jung
Offset-Compensated Cross-Coupled PFET Bit-Line Conditioning and Selective Negative Bit-Line Write Assist for High-Density Low-Power SRAM. IEEE Trans. Circuits Syst. I Regul. Pap. (4) (2015)
Heechai Kang, Jisu Kim, Hanwool Jeong, Younghwi Yang, Seong-Ook Jung
Architecture-Aware Analytical Yield Model for Read Access in Static Random Access Memory. IEEE Trans. Very Large Scale Integr. Syst. 23 (4) (2015)
Hanwool Jeong, Taewon Kim, Taejoong Song, Gyu-Hong Kim, Seong-Ook Jung
Trip-Point Bit-Line Precharge Sensing Scheme for Single-Ended SRAM. IEEE Trans. Very Large Scale Integr. Syst. 23 (7) (2015)
Hanwool Jeong, Taewon Kim, Kyoman Kang, Taejoong Song, Gyu-Hong Kim, Hyo-Sig Won, Seong-Ook Jung
Switching pMOS Sense Amplifier for High-Density Low-Voltage Single-Ended SRAM. IEEE Trans. Circuits Syst. I Regul. Pap. (6) (2015)
Hanwool Jeong, Younghwi Yang, Junha Lee, Jisu Kim, Seong-Ook Jung
One-Sided Static Noise Margin and Gaussian-Tail-Fitting Method for SRAM. IEEE Trans. Very Large Scale Integr. Syst. 22 (6) (2014)
Hanwool Jeong, Taewon Kim, Seong-Ook Jung, Taejoong Song, Gyu-Hong Kim
Pseudo NMOS based sense amplifier for high speed single-ended SRAM. ICECS (2014)
Taehui Na, Seung-Han Woo, Jisu Kim, Hanwool Jeong, Seong-Ook Jung
Comparative Study of Various Latch-Type Sense Amplifiers. IEEE Trans. Very Large Scale Integr. Syst. 22 (2) (2014)
Hanwool Jeong, Younghwi Yang, Junha Lee, Jisu Kim, Seong-Ook Jung
Static read stability and write ability metrics in FinFET based SRAM considering read and write-assist circuits. ICECS (2012)
Junha Lee, Hanwool Jeong, Younghwi Yang, Jisu Kim, Seong-Ook Jung
Impact of fin thickness and height on read stability / write ability in tri-gate FinFET based SRAM. ISOCC (2012)