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Heechai Kang
ORCID
Publication Activity (10 Years)
Years Active: 2010-2020
Publications (10 Years): 4
Top Topics
Power Reduction
Phase Shift
Multiple Input
Flip Flops
Top Venues
IEEE Trans. Very Large Scale Integr. Syst.
IEEE Trans. Circuits Syst. I Regul. Pap.
LASCAS
IEEE J. Solid State Circuits
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Publications
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Venkata Suresh Rayudu
,
Heechai Kang
,
Ranjit Gharpurey
An N-Path Filter with Multiphase PWM Clocks for Harmonic Response Suppression.
LASCAS
(2020)
Heechai Kang
,
Wei-Gi Ho
,
Vineet Kumar Singh
,
Ranjit Gharpurey
A Wideband Receiver Employing PWM-Based Harmonic Rejection Downconversion.
IEEE J. Solid State Circuits
53 (5) (2018)
Jung-Hyun Park
,
Heechai Kang
,
Dong-Hoon Jung
,
Kyungho Ryu
,
Seong-Ook Jung
Level-Converting Retention Flip-Flop for Reducing Standby Power in ZigBee SoCs.
IEEE Trans. Very Large Scale Integr. Syst.
23 (3) (2015)
Heechai Kang
,
Jisu Kim
,
Hanwool Jeong
,
Younghwi Yang
,
Seong-Ook Jung
Architecture-Aware Analytical Yield Model for Read Access in Static Random Access Memory.
IEEE Trans. Very Large Scale Integr. Syst.
23 (4) (2015)
Heechai Kang
,
Kyungho Ryu
,
Dong-Hoon Jung
,
Donghwan Lee
,
Won Lee
,
SuHo Kim
,
JongRyun Choi
,
Seong-Ook Jung
Process Variation Tolerant All-Digital 90° Phase Shift DLL for DDR3 Interface.
IEEE Trans. Circuits Syst. I Regul. Pap.
(10) (2012)
Heechai Kang
,
Kyungho Ryu
,
Donghwan Lee
,
Won Lee
,
SuHo Kim
,
JongRyun Choi
,
Seong-Ook Jung
Process variation tolerant all-digital multiphase DLL for DDR3 interface.
CICC
(2010)