Chih-Sheng Hou

Publication Activity (10 Years)

Years Active: 2010-2016
Publications (10 Years): 2

Top Topics

Information Hiding Scheme

High Compression

Top Venues

J. Electron. Test.

Publications

Chih-Sheng Hou, Yong-Xiao Chen, Jin-Fu Li, Chih-Yen Lo, Ding-Ming Kwai, Yung-Fa Chou
A built-in self-repair scheme for DRAMs with spare rows, columns, and bits. ITC (2016)
Chih-Sheng Hou, Jin-Fu Li
High Repair-Efficiency BISR Scheme for RAMs by Reusing Bitmap for Bit Redundancy. IEEE Trans. Very Large Scale Integr. Syst. 23 (9) (2015)
Chih-Sheng Hou, Jin-Fu Li, Ting-Jun Fu
A BIST Scheme With the Ability of Diagnostic Data Compression for RAMs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 33 (12) (2014)
Chih-Sheng Hou, Jin-Fu Li
Testing Disturbance Faults in Various NAND Flash Memories. J. Electron. Test. 30 (6) (2014)
Kuan-Te Wu, Jin-Fu Li, Yun-Chao Yu, Chih-Sheng Hou, Chi-Chun Yang, Ding-Ming Kwai, Yung-Fa Chou, Chih-Yen Lo
Intra-channel Reconfigurable Interface for TSV and Micro Bump Fault Tolerance in 3-D RAMs. ATS (2014)
Chih-Sheng Hou, Jin-Fu Li
Testing Disturbance Faults in Various NAND Flash Memories. Asian Test Symposium (2013)
Yun-Chao You, Chih-Sheng Hou, Li-Jung Chang, Jin-Fu Li, Chih-Yen Lo, Ding-Ming Kwai, Yung-Fa Chou, Cheng-Wen Wu
A hybrid ECC and redundancy technique for reducing refresh power of DRAMs. VTS (2013)
Chih-Sheng Hou, Jin-Fu Li, Chih-Yen Lo, Ding-Ming Kwai, Yung-Fa Chou, Cheng-Wen Wu
An FPGA-based test platform for analyzing data retention time distribution of DRAMs. VLSI-DAT (2013)
Chih-Sheng Hou, Jin-Fu Li
Allocation of RAM built-in self-repair circuits for SOC dies of 3D ICs. VTS (2013)
Chih-Sheng Hou, Jin-Fu Li
Disturbance fault testing on various NAND flash memories. ETS (2012)
Chih-Sheng Hou, Jin-Fu Li, Tsu-Wei Tseng
Memory Built-in Self-Repair Planning Framework for RAMs in SoCs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 30 (11) (2011)
Tsu-Wei Tseng, Chih-Sheng Hou, Jin-Fu Li
Automatic generation of memory built-in self-repair circuits in SOCs for minimizing test time and area cost. VTS (2010)
Tsu-Wei Tseng, Jin-Fu Li, Chih-Sheng Hou
A Built-in Method to Repair SoC RAMs in Parallel. IEEE Des. Test Comput. 27 (6) (2010)
Chih-Sheng Hou, Jin-Fu Li, Che-Wei Chou
Test and Repair Scheduling for Built-In Self-Repair RAMs in SOCs. DELTA (2010)
Jin-Fu Li, Tsu-Wei Tseng, Chih-Sheng Hou
Reliability-Enhancement and Self-Repair Schemes for SRAMs With Static and Dynamic Faults. IEEE Trans. Very Large Scale Integr. Syst. 18 (9) (2010)