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Chi-Chun Yang
Publication Activity (10 Years)
Years Active: 2013-2015
Publications (10 Years): 0
Top Topics
High Availability
Middle Layer
Fault Tolerance
Detection Scheme
Top Venues
ATS
VLSI-DAT
Asian Test Symposium
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Publications
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Chi-Chun Yang
,
Jin-Fu Li
,
Yun-Chao Yu
,
Kuan-Te Wu
,
Chih-Yen Lo
,
Chao-Hsun Chen
,
Jenn-Shiang Lai
,
Ding-Ming Kwai
,
Yung-Fa Chou
A hybrid built-in self-test scheme for DRAMs.
VLSI-DAT
(2015)
Kuan-Te Wu
,
Jin-Fu Li
,
Yun-Chao Yu
,
Chih-Sheng Hou
,
Chi-Chun Yang
,
Ding-Ming Kwai
,
Yung-Fa Chou
,
Chih-Yen Lo
Intra-channel Reconfigurable Interface for TSV and Micro Bump Fault Tolerance in 3-D RAMs.
ATS
(2014)
Yun-Chao You
,
Chi-Chun Yang
,
Jin-Fu Li
,
Chih-Yen Lo
,
Chao-Hsun Chen
,
Jenn-Shiang Lai
,
Ding-Ming Kwai
,
Yung-Fa Chou
,
Cheng-Wen Wu
BIST-Assisted Tuning Scheme for Minimizing IO-Channel Power of TSV-Based 3D DRAMs.
ATS
(2014)
Chi-Chun Yang
,
Che-Wei Chou
,
Jin-Fu Li
A TSV Repair Scheme Using Enhanced Test Access Architecture for 3-D ICs.
Asian Test Symposium
(2013)