Chao-Hsun Chen

Publication Activity (10 Years)

Years Active: 2005-2022
Publications (10 Years): 2

Top Topics

Dynamic Reconfiguration

Clock Frequency

Electric Vehicles

Top Venues

IEEE Trans. Computers

Publications

Kuan-Hsun Duh, Cheng-Wen Wu, Ming-Der Shieh, Chao-Hsun Chen, Ming-Yan Fan
Aging Impact of Power MOSFETs in Charger with Different Operation Frequency. ATS (2022)
Yu-You Chou, Cheng-Wen Wu, Ming-Der Shieh, Chao-Hsun Chen
Battery Pack Reliability and Endurance Enhancement for Electric Vehicles by Dynamic Reconfiguration. ATS (2022)
Chi-Chun Yang, Jin-Fu Li, Yun-Chao Yu, Kuan-Te Wu, Chih-Yen Lo, Chao-Hsun Chen, Jenn-Shiang Lai, Ding-Ming Kwai, Yung-Fa Chou
A hybrid built-in self-test scheme for DRAMs. VLSI-DAT (2015)
Yun-Chao You, Chi-Chun Yang, Jin-Fu Li, Chih-Yen Lo, Chao-Hsun Chen, Jenn-Shiang Lai, Ding-Ming Kwai, Yung-Fa Chou, Cheng-Wen Wu
BIST-Assisted Tuning Scheme for Minimizing IO-Channel Power of TSV-Based 3D DRAMs. ATS (2014)
Po-Yuan Chen, Chin-Lung Su, Chao-Hsun Chen, Cheng-Wen Wu
Generalization of an Enhanced ECC Methodology for Low Power PSRAM. IEEE Trans. Computers 62 (7) (2013)
Yu-Ying Hsiao, Chao-Hsun Chen, Cheng-Wen Wu
Built-In Self-Repair Schemes for Flash Memories. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 29 (8) (2010)
Yu-Tsao Hsing, Li-Ming Denq, Chao-Hsun Chen, Cheng-Wen Wu
Economic Analysis of the HOY Wireless Test Methodology. IEEE Des. Test Comput. 27 (3) (2010)
Jen-Chieh Yeh, Chao-Hsun Chen, Cheng-Wen Wu, Shuo-Fen Kuo
A Systematic Approach to Memory Test Time Reduction. IEEE Des. Test Comput. 25 (6) (2008)
Rei-Fu Huang, Chao-Hsun Chen, Cheng-Wen Wu
Economic Aspects of Memory Built-in Self-Repair. IEEE Des. Test Comput. 24 (2) (2007)
Yu-Ying Hsiao, Chao-Hsun Chen, Cheng-Wen Wu
A Built-In Self-Repair Scheme for NOR-Type Flash Memory. VTS (2006)
Po-Yuan Chen, Yi-Ting Yeh, Chao-Hsun Chen, Jen-Chieh Yeh, Cheng-Wen Wu, Jeng-Shen Lee, Yu-Chang Lin
An Enhanced EDAC Methodology for Low Power PSRAM. ITC (2006)
Yu-Chun Dawn, Jen-Chieh Yeh, Cheng-Wen Wu, Chia-Ching Wang, Yung-Chen Lin, Chao-Hsun Chen
Flash Memory Die Sort by a Sample Classification Method. Asian Test Symposium (2005)
Jen-Chieh Yeh, Shyr-Fen Kuo, Cheng-Wen Wu, Chih-Tsun Huang, Chao-Hsun Chen
A systematic approach to reducing semiconductor memory test time in mass production. MTDT (2005)