Generalization of an Enhanced ECC Methodology for Low Power PSRAM.
Po-Yuan ChenChin-Lung SuChao-Hsun ChenCheng-Wen WuPublished in: IEEE Trans. Computers (2013)
Keyphrases
- low power
- power consumption
- low cost
- high speed
- high power
- low power consumption
- vlsi circuits
- mixed signal
- single chip
- digital signal processing
- wireless transmission
- power reduction
- logic circuits
- design methodology
- cmos technology
- vlsi architecture
- image sensor
- real time
- low density parity check
- error correction
- gate array
- power dissipation
- power saving
- general purpose