Ben H. H. Juurlink

Publication Activity (10 Years)

Years Active: 1993-2022
Publications (10 Years): 50

Top Venues

DATE

IPDPS

HPCS

SCOPES

Publications

Sohan Lal, Sharatchandra Varma Bogaraju, Ben H. H. Juurlink
A Quantitative Study of Locality in GPU Caches for Memory-Divergent Workloads. Int. J. Parallel Program. 50 (2) (2022)
Kaijie Fan, Biagio Cosenza, Ben H. H. Juurlink
FLEXDP: flexible frequency scaling for energy-delay product optimization of GPU applications. CF (2022)
Daniel Maier, Stefan Schirmeister, Ben H. H. Juurlink
Effects of Approximate Computing on Workload Characteristics. ARCS (2022)
Sohan Lal, Manuel Renz, Julian Hartmer, Ben H. H. Juurlink
Memory Access Granularity Aware Lossless Compression for GPUs. IPDPS (2022)
Gabriel L. Nazar, Pedro H. Kopper, Marcos T. Leipnitz, Ben H. H. Juurlink
Lightweight Dual Modular Redundancy through Approximate Computing. SBESC (2021)
Sohan Lal, Jan Lucas, Ben H. H. Juurlink
QSLC: Quantization-Based, Low-Error Selective Approximation for GPUs. DATE (2021)
Biagio Cosenza, Nikita Popov, Ben H. H. Juurlink, Paul Richmond, Mozhgan Kabiri Chimeh, Carmine Spagnuolo, Gennaro Cordasco, Vittorio Scarano
Easy and efficient agent-based simulations with the OpenABL language and compiler. Future Gener. Comput. Syst. 116 (2021)
Daniel Maier, Biagio Cosenza, Ben H. H. Juurlink
ALONA: Automatic Loop Nest Approximation with Reconstruction and Space Pruning. Euro-Par (2021)
Daniel Maier, Ben H. H. Juurlink
Model-Based Loop Perforation. Euro-Par Workshops (2021)
Angela Pohl, Biagio Cosenza, Ben H. H. Juurlink
Vectorization cost modeling for NEON, AVX and SVE. Perform. Evaluation (2020)
Mohammad Loni, Ali Zoljodi, Daniel Maier, Amin Majd, Masoud Daneshtalab, Mikael Sjödin, Ben H. H. Juurlink, Reza Akbari
DenseDisp: Resource-Aware Disparity Map Estimation by Compressing Siamese Neural Architecture. CEC (2020)
Yassin Kaddar, Angela Pohl, Ben H. H. Juurlink
Accelerating The Vvc Decoder For Vector Length Agnostic Simd Architectures. ICME (2020)
Kaijie Fan, Biagio Cosenza, Ben H. H. Juurlink
Accurate Energy and Performance Prediction for Frequency-Scaled GPU Kernels. Comput. 8 (2) (2020)
Sohan Lal, Ben H. H. Juurlink
A Quantitative Study of Locality in GPU Caches. SAMOS (2020)
Philipp Habermann, Chi Ching Chi, Mauricio Alvarez Mesa, Ben H. H. Juurlink
A Bin-Based Bitstream Partitioning Approach for Parallel CABAC Decoding in Next Generation Video Coding. IPDPS (2019)
Angela Pohl, Mirko Greese, Biagio Cosenza, Ben H. H. Juurlink
A Performance Analysis of Vector Length Agnostic Code. HPCS (2019)
Matthias Goebel, Kai Norman Clasen, Robert Drehmel, Ben H. H. Juurlink
Evaluating the Memory Architecture of Next-Generation FPGA-SoCs for HPC. HPCS (2019)
Nadjib Mammeri, Ben H. H. Juurlink
VComputeLib: Enabling Cross-Platform GPGPU on Mobile and Embedded GPUs. MoMM (2019)
Sohan Lal, Jan Lucas, Ben H. H. Juurlink
SLC: Memory Access Granularity Aware Selective Lossy Compression for GPUs. DATE (2019)
Daniel Maier, Nadjib Mammeri, Biagio Cosenza, Ben H. H. Juurlink
Approximating Memory-bound Applications on Mobile GPUs. HPCS (2019)
Nadjib Mammeri, Markus Neu, Sohan Lal, Ben H. H. Juurlink
Performance Counters based Power Modeling of Mobile GPUs using Deep Learning. HPCS (2019)
Angela Pohl, Biagio Cosenza, Ben H. H. Juurlink
Portable Cost Modeling for Auto-Vectorizers. MASCOTS (2019)
Kaijie Fan, Biagio Cosenza, Ben H. H. Juurlink
Predictable GPUs Frequency Scaling for Energy and Performance. ICPP (2019)
Jan Lucas, Ben H. H. Juurlink
MEMPower: Data-Aware GPU Memory Power Model. ARCS (2019)
Apurv Ashish, Sohan Lal, Ben H. H. Juurlink
An Efficient Lightweight Framework for Porting Vision Algorithms on Embedded SoCs. IESS (2019)
Biao Wang, Diego F. de Souza, Mauricio Alvarez Mesa, Chi Ching Chi, Ben H. H. Juurlink, Aleksandar Ilic, Nuno Roma, Leonel Sousa
Highly parallel HEVC decoding for heterogeneous systems with CPU and GPU. Signal Process. Image Commun. 62 (2018)
Angela Pohl, Biagio Cosenza, Ben H. H. Juurlink
Cost Modelling for Vectorization on ARM. CLUSTER (2018)
Daniel Maier, Biagio Cosenza, Ben H. H. Juurlink
Local memory-aware kernel perforation. CGO (2018)
Biagio Cosenza, Nikita Popov, Ben H. H. Juurlink, Paul Richmond, Mozhgan Kabiri Chimeh, Carmine Spagnuolo, Gennaro Cordasco, Vittorio Scarano
OpenABL: A Domain-Specific Language for Parallel and Distributed Agent-Based Simulations. Euro-Par (2018)
Matthias Goebel, Ilja Behnke, Ahmed Elhossini, Ben H. H. Juurlink
An Application-Specific Memory Management Unit for FPGA-SoCs. IPDPS Workshops (2018)
Angela Pohl, Biagio Cosenza, Ben H. H. Juurlink
Control Flow Vectorization for ARM NEON. SCOPES (2018)
Nadjib Mammeri, Ben H. H. Juurlink
VComputeBench: A Vulkan Benchmark Suite for GPGPU on Mobile and Embedded GPUs. IISWC (2018)
Jan Lucas, Sohan Lal, Ben H. H. Juurlink
Optimal DC/AC data bus inversion coding. DATE (2018)
Christina Quast, Angela Pohl, Biagio Cosenza, Ben H. H. Juurlink, Rainer Schwemmer
Accelerating the RICH Particle Detector Algorithm on Intel Xeon Phi. PDP (2018)
Hossein Amiri, Asadollah Shahbahrami, Angela Pohl, Ben H. H. Juurlink
Performance evaluation of implicit and explicit SIMDization. Microprocess. Microsystems 63 (2018)
Matthias Göbel, Ahmed Elhossini, Chi Ching Chi, Mauricio Alvarez Mesa, Ben H. H. Juurlink
A Quantitative Analysis of the Memory Architecture of FPGA-SoCs. ARC (2017)
Biagio Cosenza, Juan José Durillo, Stefano Ermon, Ben H. H. Juurlink
Autotuning Stencil Computations with Structural Ordinal Regression Learning. IPDPS (2017)
Sohan Lal, Jan Lucas, Ben H. H. Juurlink
E^2MC: Entropy Encoding Based Memory Compression for GPUs. IPDPS (2017)
Ben H. H. Juurlink, Jan Lucas, Nadjib Mammeri, Martyn Bliss, Georgios Keramidas, Chrysa Kokkala, Andrew Richards
The LPGPU2 Project: Low-Power Parallel Computing on GPUs: Extended Abstract. SCOPES (2017)
Philipp Habermann, Chi Ching Chi, Mauricio Alvarez Mesa, Ben H. H. Juurlink
Syntax Element Partitioning for high-throughput HEVC CABAC decoding. ICASSP (2017)
Biagio Cosenza, Juan José Durillo, Stefano Ermon, Ben H. H. Juurlink
Stencil Autotuning with Ordinal Regression: Extended Abstract. SCOPES (2017)
Nikita Popov, Biagio Cosenza, Ben H. H. Juurlink, Dmitry Stogov
Static optimization in PHP 7. CC (2017)
Matthias Göbel, Ahmed Elhossini, Ben H. H. Juurlink
A Methodology for Predicting Application-Specific Achievable Memory Bandwidth for HW/SW-Codesign. DSD (2017)
Ben H. H. Juurlink, Jan Lucas, Nadjib Mammeri, Georgios Keramidas, Katerina Pontzolkova, Ignacio Aransay, Chrysa Kokkala, Martyn Bliss, Andrew Richards
approach. DASIP (2017)
Biao Wang, Diego F. de Souza, Mauricio Alvarez Mesa, Chi Ching Chi, Ben H. H. Juurlink, Aleksandar Ilic, Nuno Roma, Leonel Sousa
GPU Parallelization of HEVC In-Loop Filters. Int. J. Parallel Program. 45 (6) (2017)
Jan Lucas, Ben H. H. Juurlink
ALUPower: Data Dependent Power Consumption in GPUs. MASCOTS (2016)
Lester Kalms, Ahmed Elhossini, Ben H. H. Juurlink
FPGA based hardware accelerator for KAZE feature extraction algorithm. FPT (2016)
Angela Pohl, Biagio Cosenza, Mauricio Alvarez Mesa, Chi Ching Chi, Ben H. H. Juurlink
An evaluation of current SIMD programming models for C++. WPMVP@PPoPP (2016)
Maurice Peemen, Runbin Shi, Sohan Lal, Ben H. H. Juurlink, Bart Mesman, Henk Corporaal
The neuro vector engine: Flexibility to improve convolutional net efficiency for wearable vision. DATE (2016)
Biao Wang, Mauricio Alvarez Mesa, Chi Ching Chi, Ben H. H. Juurlink, Diego F. de Souza, Aleksandar Ilic, Nuno Roma, Leonel Sousa
Efficient HEVC decoder for heterogeneous CPU with GPU systems. MMSP (2016)
Tamer Dallou, Nina Engelhardt, Ahmed Elhossini, Ben H. H. Juurlink
Nexus#: A Distributed Hardware Task Manager for Task-Based Programming Models. IPDPS (2015)
Hichem Ben Fekih, Ahmed Elhossini, Ben H. H. Juurlink
An Efficient and Flexible FPGA Implementation of a Face Detection System. ARC (2015)
Matthias Göbel, Chi Ching Chi, Mauricio Alvarez Mesa, Ben H. H. Juurlink
High Performance Memory Accesses on FPGA-SoCs: A Quantitative Analysis. FCCM (2015)
Philipp Habermann, Chi Ching Chi, Mauricio Alvarez Mesa, Ben H. H. Juurlink
Optimizing HEVC CABAC Decoding with a Context Model Cache and Application-Specific Prefetching. ISM (2015)
Michael Andersch, Jan Lucas, Mauricio Alvarez Mesa, Ben H. H. Juurlink
On latency in GPU throughput microarchitectures. ISPASS (2015)
Biao Wang, Mauricio Alvarez Mesa, Chi Ching Chi, Ben H. H. Juurlink
Parallel H.264/AVC Motion Compensation for GPUs Using OpenCL. IEEE Trans. Circuits Syst. Video Technol. 25 (3) (2015)
Hichem Ben Fekih, Ahmed Elhossini, Ben H. H. Juurlink
An Efficient and Flexible FPGA Implementation of a Face Detection System (Abstract Only). FPGA (2015)
Jan Lucas, Michael Andersch, Mauricio Alvarez Mesa, Ben H. H. Juurlink
Spatiotemporal SIMT and Scalarization for Improving GPU Efficiency. ACM Trans. Archit. Code Optim. 12 (3) (2015)
Gabriel Cebrián-Márquez, Chi Ching Chi, José Luis Martínez, Pedro Cuenca, Mauricio Alvarez Mesa, Sergio Sanz Rodríguez, Ben H. H. Juurlink
Reducing HEVC encoding complexity using two-stage motion estimation. VCIP (2015)
Jerónimo Castrillón, Lothar Thiele, Lars Schor, Weihua Sheng, Ben H. H. Juurlink, Mauricio Alvarez Mesa, Angela Pohl, Ralph Jessenberger, Victor Reyes, Rainer Leupers
Multi/many-core programming: where are we standing? DATE (2015)
Chi Ching Chi, Mauricio Alvarez Mesa, Benjamin Bross, Ben H. H. Juurlink, Thomas Schierl
SIMD Acceleration for HEVC Decoding. IEEE Trans. Circuits Syst. Video Technol. 25 (5) (2015)
Nina Engelhardt, Tamer Dallou, Ahmed Elhossini, Ben H. H. Juurlink
An Integrated Hardware-Software Approach to Task Graph Management. HPCC/CSS/ICESS (2014)
Gervin Thomas, Ahmed Elhossini, Ben H. H. Juurlink
A generic implementation of a quantified predictor on FPGAs. ACM Great Lakes Symposium on VLSI (2014)
Jan Hendrik Schönherr, Ben H. H. Juurlink, Jan Richling
TACO: A scheduling scheme for parallel applications on multicore architectures. Sci. Program. 22 (3) (2014)
Sohan Lal, Jan Lucas, Michael Andersch, Mauricio Alvarez Mesa, Ahmed Elhossini, Ben H. H. Juurlink
GPGPU workload characteristics and performance analysis. ICSAMOS (2014)
Chi Ching Chi, Mauricio Alvarez Mesa, Ben H. H. Juurlink
Low-Power High-Efficiency Video Decoding using General-Purpose Processors. ACM Trans. Archit. Code Optim. 11 (4) (2014)
Jan Lucas, Sohan Lal, Michael Andersch, Mauricio Alvarez Mesa, Ben H. H. Juurlink
How a single chip causes massive power bills GPUSimPow: A GPGPU power simulator. ISPASS (2013)
Benjamin Bross, Valeri George, Mauricio Alvarez Mesa, Tobias Mayer, Chi Ching Chi, Jens Brandenburg, Thomas Schierl, Detlev Marpe, Ben H. H. Juurlink
HEVC performance and complexity for 4K video. ICCE-Berlin (2013)
Chi Ching Chi, Mauricio Alvarez Mesa, Jan Lucas, Ben H. H. Juurlink, Thomas Schierl
Parallel HEVC Decoding on Multi- and Many-core Architectures - A Power and Performance Analysis. J. Signal Process. Syst. 71 (3) (2013)
Stefan Hauser, Nico Moser, Ben H. H. Juurlink
SynZEN: A hybrid TTA/VLIW architecture with a distributed register file. NORCHIP (2012)
Michael Andersch, Chi Ching Chi, Ben H. H. Juurlink
Programming parallel embedded and consumer applications in OpenMP superscalar. PPOPP (2012)
Ben H. H. Juurlink, Cor Meenderinck
Amdahl's law for predicting the future of multicores considered harmful. SIGARCH Comput. Archit. News 40 (2) (2012)
Tamer Dallou, Ben H. H. Juurlink
Hardware-Based Task Dependency Resolution for the StarSs Programming Model. ICPP Workshops (2012)
Biao Wang, Mauricio Alvarez Mesa, Chi Ching Chi, Ben H. H. Juurlink
An Optimized Parallel IDCT on Graphics Processing Units. Euro-Par Workshops (2012)
Mauricio Alvarez Mesa, Chi Ching Chi, Ben H. H. Juurlink, Valeri George, Thomas Schierl
Parallel video decoding in the emerging HEVC standard. ICASSP (2012)
Chi Ching Chi, Mauricio Alvarez Mesa, Ben H. H. Juurlink, Valeri George, Thomas Schierl
Improving the parallelization efficiency of HEVC decoding. ICIP (2012)
Chi Ching Chi, Mauricio Alvarez Mesa, Ben H. H. Juurlink, Gordon Clare, Félix Henry, Stéphane Pateux, Thomas Schierl
Parallel Scalability and Efficiency of HEVC Parallelization Approaches. IEEE Trans. Circuits Syst. Video Technol. 22 (12) (2012)
Michael Andersch, Chi Ching Chi, Ben H. H. Juurlink
Using OpenMP superscalar for parallelization of embedded and consumer applications. ICSAMOS (2012)
Gervin Thomas, Karthik Chandrasekar, Benny Akesson, Ben H. H. Juurlink, Kees Goossens
A Predictor-Based Power-Saving Policy for DRAM Memories. DSD (2012)
Cor Meenderinck, Ben H. H. Juurlink
Nexus: Hardware Support for Task-Based Programming. DSD (2011)
Arnaldo Azevedo, Ben H. H. Juurlink, Cor Meenderinck, Andrei Sergeevich Terechko, Jan Hoogerbrugge, Mauricio Alvarez, Alex Ramírez, Mateo Valero
A Highly Scalable Parallel Implementation of H.264. Trans. High Perform. Embed. Archit. Compil. 4 (2011)
Jude Angelo Ambrose, Anca Mariana Molnos, Andrew Nelson, Sorin Cotofana, Kees Goossens, Ben H. H. Juurlink
Composable local memory organisation for streaming applications on embedded MPSoCs. Conf. Computing Frontiers (2011)
Chi Ching Chi, Ben H. H. Juurlink
A QHD-capable parallel H.264 decoder. ICS (2011)
Madhavan Manivannan, Ben H. H. Juurlink, Per Stenström
Implications of Merging Phases on Scalability of Multi-core Architectures. ICPP (2011)
Ben H. H. Juurlink
Multi-Core - the Future of Embedded Systems. MBMV (2011)
Madhavan Manivannan, Ben H. H. Juurlink, Per Stenström
Poster: implications of merging phases on scalability of multi-core architectures. ICS (2011)
Arnaldo Azevedo, Ben H. H. Juurlink
An Instruction to Accelerate Software Caches. ARCS (2011)
Demid Borodin, Ben H. H. Juurlink
Instruction precomputation with memoization for fault detection. DATE (2010)
Chi Ching Chi, Ben H. H. Juurlink, Cor Meenderinck
Evaluation of parallel H.264 decoding strategies for the Cell Broadband Engine. ICS (2010)
Martijn Briejer, Cor Meenderinck, Ben H. H. Juurlink
Extending the Cell SPE with Energy Efficient Branch Prediction. Euro-Par (1) (2010)
Arnaldo Azevedo, Ben H. H. Juurlink
A Multidimensional Software Cache for Scratchpad-Based Systems. Int. J. Embed. Real Time Commun. Syst. 1 (4) (2010)
Alex Ramírez, Felipe Cabarcas, Ben H. H. Juurlink, Mauricio Alvarez, Friman Sánchez, Arnaldo Azevedo, Cor Meenderinck, Catalin Bogdan Ciobanu, Sebastián Isaza, Georgi Gaydadjiev
The SARC Architecture. IEEE Micro 30 (5) (2010)
Cor Meenderinck, Ben H. H. Juurlink
A Case for Hardware Task Management Support for the StarSS Programming Model. DSD (2010)
Demid Borodin, Ben H. H. Juurlink
Protective redundancy overhead reduction using instruction vulnerability factor. Conf. Computing Frontiers (2010)
Asadollah Shahbahrami, Ben H. H. Juurlink
SIMD Architectural Enhancements to Improve the Performance of the 2D Discrete Wavelet Transform. DSD (2009)
Cor Meenderinck, Arnaldo Azevedo, Ben H. H. Juurlink, Mauricio Alvarez, Alex Ramírez
Parallel Scalability of Video Decoders. J. Signal Process. Syst. 57 (2) (2009)
Cor Meenderinck, Ben H. H. Juurlink
Intra-vector SIMD instructions for core specialization. ICCD (2009)
Demid Borodin, Ben H. H. Juurlink, Said Hamdioui, Stamatis Vassiliadis
Instruction-Level Fault Tolerance Configurability. J. Signal Process. Syst. 57 (1) (2009)
Gerard J. M. Smit, Gerrit F. van der Hoeven, Jan Friso Groote, Ralph H. J. M. Otten, Hans Tonino, Ben H. H. Juurlink, Boudewijn R. H. M. Haverkort
The 3TU embedded systems master in the Netherlands. WESE@ESWEEK (2009)
Asadollah Shahbahrami, Ben H. H. Juurlink
Performance Improvement of Multimedia Kernels by Alleviating Overhead Instructions on SIMD Devices. APPT (2009)

Ben H. H. Juurlink.css-eqlu8i{font-size:small;padding-left:4px;}

Publication Activity (10 Years)

Top Topics

Top Venues

Ben H. H. Juurlink