FPGA based hardware accelerator for KAZE feature extraction algorithm.
Lester KalmsAhmed ElhossiniBen H. H. JuurlinkPublished in: FPT (2016)
Keyphrases
- preprocessing
- hardware implementation
- learning algorithm
- optimization algorithm
- experimental evaluation
- feature extraction
- parallel implementation
- times faster
- k means
- dynamic programming
- hardware architecture
- expectation maximization
- computational cost
- image processing
- objective function
- np hard
- computational complexity
- real time
- matching algorithm
- detection algorithm
- particle swarm optimization
- simulated annealing
- low cost
- search space
- high accuracy
- optimal solution
- recognition algorithm
- worst case
- extracted features
- feature vectors
- significant improvement