Jude Angelo Ambrose

Publication Activity (10 Years)

Years Active: 2007-2021
Publications (10 Years): 4

Top Venues

ISCAS

ASP-DAC

VLSI Design

DATE

University of New South Wales, Sydney, Australia (PHD)

Education History

University of New South Wales, Sydney, Australia

PHD

Publications

Darshana Jayasinghe, Aleksandar Ignjatovic, Roshan G. Ragel, Jude Angelo Ambrose, Sri Parameswaran
QuadSeal: Quadruple Balancing to Mitigate Power Analysis Attacks with Variability Effects and Electromagnetic Fault Injection Attacks. ACM Trans. Design Autom. Electr. Syst. 26 (5) (2021)
Tuo Li, Muhammad Shafique, Jude Angelo Ambrose, Jörg Henkel, Sri Parameswaran
Fine-Grained Checkpoint Recovery for Application-Specific Instruction-Set Processors. IEEE Trans. Computers 66 (4) (2017)
Tuo Li, Jude Angelo Ambrose, Sri Parameswaran
RECORD: Reducing register traffic for checkpointing in embedded processors. DATE (2016)
Tuo Li, Jude Angelo Ambrose, Roshan G. Ragel, Sri Parameswaran
Processor Design for Soft Errors: Challenges and State of the Art. ACM Comput. Surv. 49 (3) (2016)
Jude Angelo Ambrose, Tuo Li, Daniel Murphy, Shivam Gargg, Nick Higgins, Sri Parameswaran
ARGUS: A Framework for Rapid Design and Prototype of Heterogeneous Multicore Systems in FPGA. VLSI Design (2015)
Roshan G. Ragel, Jude Angelo Ambrose, Sri Parameswaran
SecureD: A Secure Dual Core Embedded Processor. CoRR (2015)
Liang Tang, Jude Angelo Ambrose, Akash Kumar, Sri Parameswaran
Dynamic reconfigurable puncturing for secure wireless communication. DATE (2015)
Jude Angelo Ambrose, Nick Higgins, Mrinal Chakravarthy, Shivam Gargg, Tuo Li, Daniel Murphy, Aleksandar Ignjatovic, Sri Parameswaran
ARCHER: Communication-based predictive architecture selection for application specific multiprocessor Systems-on-Chip. ISCAS (2015)
Jude Angelo Ambrose, Roshan G. Ragel, Darshana Jayasinghe, Tuo Li, Sri Parameswaran
Side channel attacks in embedded systems: A tale of hostilities and deterrence. ISQED (2015)
Darshana Jayasinghe, Aleksandar Ignjatovic, Jude Angelo Ambrose, Roshan G. Ragel, Sri Parameswaran
QuadSeal: Quadruple algorithmic symmetrizing countermeasure against power based side-channel attacks. CASES (2015)
Xi Zhang, Haris Javaid, Muhammad Shafique, Jude Angelo Ambrose, Jörg Henkel, Sri Parameswaran
ADAPT: An adaptive manycore methodology for software pipelined applications. ASP-DAC (2015)
Jude Angelo Ambrose, Yusuke Yachide, Kapil Batra, Jorgen Peddersen, Sri Parameswaran
Sequential C-code to distributed pipelined heterogeneous MPSoC synthesis for streaming applications. ICCD (2015)
Héctor Pettenghi, Jude Angelo Ambrose, Ricardo Chaves, Leonel Sousa
Method for designing multi-channel RNS architectures to prevent power analysis SCA. ISCAS (2014)
Darshana Jayasinghe, Roshan G. Ragel, Jude Angelo Ambrose, Aleksandar Ignjatovic, Sri Parameswaran
Advanced modes in AES: Are they safe from power analysis based side channel attacks? ICCD (2014)
Roshan G. Ragel, Swarnalatha Radhakrishnan, Jude Angelo Ambrose
Instruction-set Selection for Multi-application based ASIP Design: An Instruction-level Study. CoRR (2014)
Liang Tang, Jude Angelo Ambrose, Sri Parameswaran, Sha Zhu
Reconfigurable Convolutional Codec for Physical Layer Communication Security Application. MILCOM (2014)
Vinitha Arakkonam Palaniveloo, Jude Angelo Ambrose, Arcot Sowmya
Improving GA-Based NoC Mapping Algorithms Using a Formal Model. ISVLSI (2014)
Jude Angelo Ambrose, Jorgen Peddersen, Sri Parameswaran, Alvin Labios, Yusuke Yachide
SDG2KPN: System Dependency Graph to function-level KPN generation of legacy code for MPSoCs. ASP-DAC (2014)
Tuo Li, Muhammad Shafique, Jude Angelo Ambrose, Semeen Rehman, Jörg Henkel, Sri Parameswaran
RASTER: runtime adaptive spatial/temporal error resiliency for embedded processors. DAC (2013)
Liang Tang, Jude Angelo Ambrose, Sri Parameswaran
Reconfigurable pipelined coprocessor for multi-mode communication transmission. DAC (2013)
Roshan G. Ragel, Swarnalatha Radhakrishnan, Jude Angelo Ambrose, Sri Parameswaran
A Study on Instruction-set Selection Using Multi-application Based Application Specific Instruction-set Processors. VLSI Design (2013)
Tuo Li, Muhammad Shafique, Semeen Rehman, Jude Angelo Ambrose, Jörg Henkel, Sri Parameswaran
DHASER: dynamic heterogeneous adaptation for soft-error resiliency in ASIP-based multi-core systems. ICCAD (2013)
Jude Angelo Ambrose, Héctor Pettenghi, Leonel Sousa
DARNS: A randomized multi-modulo RNS architecture for double-and-add in ECC to prevent power analysis side channel attacks. ASP-DAC (2013)
Liang Tang, Jude Angelo Ambrose, Sri Parameswaran
Variable increment step based reconfigurable interleaver for multimode communication application. ISCAS (2013)
Liang Tang, Jude Angelo Ambrose, Sri Parameswaran
MAPro: A Tiny Processor for Reconfigurable Baseband Modulation Mapping. VLSI Design (2013)
Jude Angelo Ambrose, Isuru Nawinne, Sri Parameswaran
Latency-constrained binding of data flow graphs to energy conscious GALS-based MPSoCs. ISCAS (2013)
Jude Angelo Ambrose, Héctor Pettenghi, Darshana Jayasinghe, Leonel Sousa
Randomised multi-modulo residue number system architecture for double-and-add to prevent power analysis side channel attacks. IET Circuits Devices Syst. 7 (5) (2013)
Tuo Li, Muhammad Shafique, Semeen Rehman, Swarnalatha Radhakrishnan, Roshan G. Ragel, Jude Angelo Ambrose, Jörg Henkel, Sri Parameswaran
CSER: HW/SW configurable soft-error resiliency for application specific instruction-set processors. DATE (2013)
Lawrance Zhang, Jude Angelo Ambrose, Jorgen Peddersen, Sri Parameswaran, Roshan G. Ragel, Swarnalatha Radhakrishnan, Kewal K. Saluja
DRMA: dynamically reconfigurable MPSoC architecture. ACM Great Lakes Symposium on VLSI (2013)
Ankita Arora, Jude Angelo Ambrose, Jorgen Peddersen, Sri Parameswaran
A double-width algorithmic balancing to prevent power analysis Side Channel Attacks in AES. ISVLSI (2013)
Mohammad Shihabul Haque, Roshan G. Ragel, Jude Angelo Ambrose, Swarnalatha Radhakrishnan, Sri Parameswaran
DIMSim: a rapid two-level cache simulation approach for deadline-based MPSoCs. CODES+ISSS (2012)
Héctor Pettenghi, Leonel Sousa, Jude Angelo Ambrose
Efficient implementation of multi-moduli architectures for Binary-to-RNS conversion. ASP-DAC (2012)
Jude Angelo Ambrose, Aleksandar Ignjatovic, Sri Parameswaran
CoRaS: A multiprocessor key corruption and random round swapping for power analysis side channel attacks: A DES case study. ISCAS (2012)
Tuo Li, Jude Angelo Ambrose, Sri Parameswaran
Fine-grained hardware/software methodology for process migration in MPSoCs. ICCAD (2012)
Jude Angelo Ambrose, Roshan G. Ragel, Sri Parameswaran
Randomized Instruction Injection to Counter Power Analysis Attacks. ACM Trans. Embed. Comput. Syst. 11 (3) (2012)
Radu Andrei Stefan, Anca Mariana Molnos, Jude Angelo Ambrose, Kees Goossens
A TDM NoC supporting QoS, multicast, and fast connection set-up. DATE (2012)
Jude Angelo Ambrose, Roshan G. Ragel, Sri Parameswaran, Aleksandar Ignjatovic
Multiprocessor information concealment architecture to prevent power analysis-based side channel attacks. IET Comput. Digit. Tech. 5 (1) (2011)
Jude Angelo Ambrose, Anca Mariana Molnos, Andrew Nelson, Sorin Cotofana, Kees Goossens, Ben H. H. Juurlink
Composable local memory organisation for streaming applications on embedded MPSoCs. Conf. Computing Frontiers (2011)
Andreas Hansson, Marcus Ekerhult, Anca Mariana Molnos, Aleksandar Milutinovic, Andrew Nelson, Jude Angelo Ambrose, Kees Goossens
Design and implementation of an operating system for composable processor sharing. Microprocess. Microsystems 35 (2) (2011)
Roshan G. Ragel, Jude Angelo Ambrose, Jorgen Peddersen, Sri Parameswaran
RACE: A Rapid, ArChitectural Simulation and Synthesis Framework for Embedded Processors. DIPES/BICC (2010)
Jude Angelo Ambrose, Sri Parameswaran, Aleksandar Ignjatovic
MUTE-AES: a multiprocessor architecture to prevent power analysis based side channel attack of the AES algorithm. ICCAD (2008)
Jude Angelo Ambrose, Naeill Aldon, Aleksandar Ignjatovic, Sri Parameswaran
Anatomy of Differential Power Analysis for AES. SYNASC (2008)
Jude Angelo Ambrose, Roshan G. Ragel, Sri Parameswaran
A smart random code injection to mask power analysis based side channel attacks. CODES+ISSS (2007)
Jude Angelo Ambrose, Roshan G. Ragel, Sri Parameswaran
RIJID: Random Code Injection to Mask Power Analysis based Side Channel Attacks. DAC (2007)

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Publication Activity (10 Years)

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Jude Angelo Ambrose