Haris Javaid

Publication Activity (10 Years)

Years Active: 2008-2024
Publications (10 Years): 21

Top Topics

Application Specific

Top Venues

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.

Publications

Jing Gong, Hassaan Saadat, Haris Javaid, Hasindu Gamaarachchi, David Taubman, Sri Parameswaran
SEA: Sign-Separated Accumulation Scheme for Resource-Efficient DNN Accelerators. DATE (2024)
Siddhartha, Justin Tan, Rajesh Bansal, Huang Chee Cheun, Yuta Tokusashi, Chong Yew Kwan, Haris Javaid, Mario Baldi
Demo: Enabling DNN Inference in the Network Data Plane. EuroP4@CoNEXT (2023)
Guanwen Zhong, Aditya Kolekar, Burin Amornpaisannon, Inho Choi, Haris Javaid, Mario Baldi
A Primer on RecoNIC: RDMA-enabled Compute Offloading on SmartNIC. CoRR (2023)
Jing Gong, Hassaan Saadat, Hasindu Gamaarachchi, Haris Javaid, Xiaobo Sharon Hu, Sri Parameswaran
ApproxTrain: Fast Simulation of Approximate Multipliers for DNN Training and Inference. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42 (11) (2023)
Rashmi Agrawal, Ji Yang, Haris Javaid
Efficient FPGA-based ECDSA Verification Engine for Permissioned Blockchains. ASAP (2022)
Haris Javaid, Ji Yang, Nathania Santoso, Mohit Upadhyay, Sundararajarao Mohan, Chengchen Hu, Gordon J. Brebner
Blockchain Machine: A Network-Attached Hardware Accelerator for Hyperledger Fabric. ICDCS (2022)
Rashmi Agrawal, Ji Yang, Haris Javaid
Efficient FPGA-based ECDSA Verification Engine For Permissioned Blockchains. FPGA (2022)
Nathania Santoso, Haris Javaid
Improving Energy Efficiency of Permissioned Blockchains Using FPGAs. CoRR (2022)
Nathania Santoso, Haris Javaid
Improving Energy Efficiency of Permissioned Blockchains Using FPGAs. ICPADS (2022)
Jing Gong, Hassaan Saadat, Hasindu Gamaarachchi, Haris Javaid, Xiaobo Sharon Hu, Sri Parameswaran
ApproxTrain: Fast Simulation of Approximate Multipliers for DNN Training and Inference. CoRR (2022)
Haris Javaid, Ji Yang, Nathania Santoso, Mohit Upadhyay, Sundararajarao Mohan, Chengchen Hu, Gordon J. Brebner
Blockchain Machine: A Network-Attached Hardware Accelerator for Hyperledger Fabric. CoRR (2021)
Rashmi Agrawal, Ji Yang, Haris Javaid
Efficient FPGA-based ECDSA Verification Engine for Permissioned Blockchains. CoRR (2021)
Hassaan Saadat, Haris Javaid, Aleksandar Ignjatovic, Sri Parameswaran
WEID: Worst-case Error Improvement in Approximate Dividers. ASP-DAC (2020)
Hassaan Saadat, Haris Javaid, Aleksandar Ignjatovic, Sri Parameswaran
REALM: Reduced-Error Approximate Log-based Integer Multiplier. DATE (2020)
Amin Malekpour, Roshan G. Ragel, Tuo Li, Haris Javaid, Aleksandar Ignjatovic, Sri Parameswaran
Hardware Trojan Mitigation in Pipelined MPSoCs. ACM Trans. Design Autom. Electr. Syst. 25 (1) (2020)
Hassaan Saadat, Tuo Li, Haris Javaid, Sri Parameswaran
A Sub-Range Error Characterization based Selection Methodology for Approximate Arithmetic Units. VLSI Design (2020)
Guanwen Zhong, Haris Javaid, Hassaan Saadat, Lingchao Xu, Chengchen Hu, Gordon J. Brebner
FastProxy: Hardware and Software Acceleration of Stratum Mining Proxy. CVCBT (2019)
Hassaan Saadat, Haris Javaid, Sri Parameswaran
Approximate Integer and Floating-Point Dividers with Near-Zero Error Bias. DAC (2019)
Haris Javaid, Chengchen Hu, Gordon J. Brebner
Optimizing Validation Phase of Hyperledger Fabric. MASCOTS (2019)
Haris Javaid, Chengchen Hu, Gordon J. Brebner
Optimizing Validation Phase of Hyperledger Fabric. CoRR (2019)
Isuru Nawinne, Haris Javaid, Roshan G. Ragel, Sri Parameswaran
Switchable cache: utilising dark silicon for application specific cache optimisations. IET Comput. Digit. Tech. 10 (4) (2016)
Isuru Nawinne, Haris Javaid, Roshan G. Ragel, Swarnalatha Radhakrishnan, Sri Parameswaran
Exploring Multilevel Cache Hierarchies in Application Specific MPSoCs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 34 (12) (2015)
Haseeb Bokhari, Haris Javaid, Muhammad Shafique, Jörg Henkel, Sri Parameswaran
Malleable NoC: dark silicon inspired adaptable Network-on-Chip. DATE (2015)
Haseeb Bokhari, Haris Javaid, Muhammad Shafique, Jörg Henkel, Sri Parameswaran
SuperNet: multimode interconnect architecture for manycore chips. DAC (2015)
Xi Zhang, Haris Javaid, Muhammad Shafique, Jude Angelo Ambrose, Jörg Henkel, Sri Parameswaran
ADAPT: An adaptive manycore methodology for software pipelined applications. ASP-DAC (2015)
Xi Zhang, Haris Javaid, Muhammad Shafique, Jorgen Peddersen, Jörg Henkel, Sri Parameswaran
E-pipeline: elastic hardware/software pipelines on a many-core fabric. DATE (2015)
Haris Javaid, Yusuke Yachide, Su Myat Min Shwe, Haseeb Bokhari, Sri Parameswaran
FALCON: A Framework for HierarchicAL Computation of Metrics for CompONent-Based Parameterized SoCs. DAC (2014)
Hong Chinh Doan, Haris Javaid, Sri Parameswaran
Flexible and scalable implementation of H.264/AVC encoder for multiple resolutions using ASIPs. DATE (2014)
Haris Javaid, Muhammad Shafique, Jörg Henkel, Sri Parameswaran
Energy-Efficient Adaptive Pipelined MPSoCs for Multimedia Applications. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 33 (5) (2014)
Isuru Nawinne, Josef Schneider, Haris Javaid, Sri Parameswaran
Hardware-based fast exploration of cache hierarchies in application specific MPSoCs. DATE (2014)
Haseeb Bokhari, Haris Javaid, Muhammad Shafique, Jörg Henkel, Sri Parameswaran
darkNoC: Designing Energy-Efficient Network-on-Chip with Multi-Vt Cells for Dark Silicon. DAC (2014)
Haris Javaid, Aleksandar Ignjatovic, Sri Parameswaran
Performance Estimation of Pipelined MultiProcessor System-on-Chips (MPSoCs). IEEE Trans. Parallel Distributed Syst. 25 (8) (2014)
Su Myat Min, Haris Javaid, Sri Parameswaran
RExCache: Rapid exploration of unified last-level cache. ASP-DAC (2013)
Haseeb Bokhari, Haris Javaid, Sri Parameswaran
System-level optimization of on-chip communication using express links for throughput constrained MPSoCs. ESTIMedia (2013)
Haris Javaid, Daniel Witono, Sri Parameswaran
Multi-mode pipelined MPSoCs for streaming applications. ASP-DAC (2013)
Thannirmalai Somu Muthukaruppan, Haris Javaid, Tulika Mitra, Sri Parameswaran
Energy-aware synthesis of application specific MPSoCs. ICCD (2013)
Su Myat Min, Haris Javaid, Sri Parameswaran
XDRA: exploration and optimization of last-level cache for energy reduction in DDR DRAMs. DAC (2013)
Su Myat Min, Haris Javaid, Aleksandar Ignjatovic, Sri Parameswaran
A case study on exploration of last-level cache for energy reduction in DDR3 DRAM. MECO (2013)
Hong Chinh Doan, Haris Javaid, Sri Parameswaran
Multi-ASIP based parallel and scalable implementation of motion estimation kernel for high definition videos. ESTIMedia (2011)
Haris Javaid, Muhammad Shafique, Jörg Henkel, Sri Parameswaran
System-level application-aware dynamic power management in adaptive pipelined MPSoCs for multimedia. ICCAD (2011)
Haris Javaid, Muhammad Shafique, Sri Parameswaran, Jörg Henkel
Low-power adaptive pipelined MPSoCs for multimedia: an H.264 video encoder case study. DAC (2011)
Haris Javaid, Aleksandar Ignjatovic, Sri Parameswaran
Fidelity metrics for estimation models. ICCAD (2010)
Haris Javaid, Andhi Janapsatya, Mohammad Shihabul Haque, Sri Parameswaran
Rapid runtime estimation methods for pipelined MPSoCs. DATE (2010)
Haris Javaid, Xin He, Aleksandar Ignjatovic, Sri Parameswaran
Optimal synthesis of latency and throughput constrained pipelined MPSoCs targeting streaming applications. CODES+ISSS (2010)
Haris Javaid, Aleksandar Ignjatovic, Sri Parameswaran
Rapid Design Space Exploration of Application Specific Heterogeneous Pipelined Multiprocessor Systems. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 29 (11) (2010)
Haris Javaid, Sri Parameswaran
A design flow for application specific heterogeneous pipelined multiprocessor systems. DAC (2009)
Haris Javaid, Sri Parameswaran
Synthesis of heterogeneous pipelined multiprocessor systems using ILP: jpeg case study. CODES+ISSS (2008)