Sri Parameswaran

ORCID

Publication Activity (10 Years)

Years Active: 1994-2024
Publications (10 Years): 80

Top Venues

Publications

Kisaru Liyanage, Hasindu Gamaarachchi, Hassaan Saadat, Tuo Li, Hiruna Samarakoon, Sri Parameswaran
Accelerating Chaining in Genomic Analysis Using RISC- V Custom Instructions. DATE (2024)
Sajid Hussain, Hui Guo, Tuo Li, Sri Parameswaran
MP-ORAM: A Novel ORAM Design for Multicore Processor Systems. IEEE Trans. Dependable Secur. Comput. 21 (4) (2024)
Jing Gong, Hassaan Saadat, Haris Javaid, Hasindu Gamaarachchi, David Taubman, Sri Parameswaran
SEA: Sign-Separated Accumulation Scheme for Resource-Efficient DNN Accelerators. DATE (2024)
Brian Udugama, Darshana Jayasinghe, Sri Parameswaran
Sensors for Remote Power Attacks: New Developments and Challenges. ASPDAC (2024)
Darshana Jayasinghe, Brian Udugama, Sri Parameswaran
1LUTSensor: Detecting FPGA Voltage Fluctuations using LookUp Tables. IACR Trans. Cryptogr. Hardw. Embed. Syst. 2024 (1) (2024)
Darshana Jayasinghe, Brian Udugama, Sri Parameswaran
FPGA Based Countermeasures against Side Channel Attacks on Block Ciphers. ASP-DAC (2023)
Alberto Bosio, Lara Dolecek, Alexandra Kourfali, Sri Parameswaran, Alessandro Savino
Special Issue: "Approximation at the Edge". ACM Trans. Embed. Comput. Syst. 22 (4) (2023)
Kisaru Liyanage, Hasindu Gamaarachchi, Roshan G. Ragel, Sri Parameswaran
Cross Layer Design Using HW/SW Co-Design and HLS to Accelerate Chaining in Genomic Analysis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42 (9) (2023)
Jing Gong, Hassaan Saadat, Hasindu Gamaarachchi, Haris Javaid, Xiaobo Sharon Hu, Sri Parameswaran
ApproxTrain: Fast Simulation of Approximate Multipliers for DNN Training and Inference. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42 (11) (2023)
Hasindu Gamaarachchi, Kisaru Liyanage, Sri Parameswaran
Invited: Algorithms and Architectures for Accelerating Long Read Sequence Analysis. DAC (2023)
Tuo Li, Sri Parameswaran
Fast Selective Flushing to Mitigate Contention-based Cache Timing Attacks. CoRR (2022)
Brian Udugama, Darshana Jayasinghe, Hassaan Saadat, Aleksandar Ignjatovic, Sri Parameswaran
A Power to Pulse Width Modulation Sensor for Remote Power Analysis Attacks. IACR Trans. Cryptogr. Hardw. Embed. Syst. 2022 (4) (2022)
Brian Udugama, Darshana Jayasinghe, Hassaan Saadat, Aleksandar Ignjatovic, Sri Parameswaran
VITI: A Tiny Self-Calibrating Sensor for Power-Variation Measurement in FPGAs. IACR Trans. Cryptogr. Hardw. Embed. Syst. 2022 (1) (2022)
Tuo Li, Sri Parameswaran
FaSe: fast selective flushing to mitigate contention-based cache timing attacks. DAC (2022)
Po Jui Shih, Hassaan Saadat, Sri Parameswaran, Hasindu Gamaarachchi
Efficient Real-Time Selective Genome Sequencing on Resource-Constrained Devices. CoRR (2022)
Hsu-Kang Dow, Tuo Li, Sri Parameswaran
HWST128: complete memory safety accelerator on RISC-V with metadata compression. DAC (2022)
Jing Gong, Hassaan Saadat, Hasindu Gamaarachchi, Haris Javaid, Xiaobo Sharon Hu, Sri Parameswaran
ApproxTrain: Fast Simulation of Approximate Multipliers for DNN Training and Inference. CoRR (2022)
Darshana Jayasinghe, Aleksandar Ignjatovic, Roshan G. Ragel, Jude Angelo Ambrose, Sri Parameswaran
QuadSeal: Quadruple Balancing to Mitigate Power Analysis Attacks with Variability Effects and Electromagnetic Fault Injection Attacks. ACM Trans. Design Autom. Electr. Syst. 26 (5) (2021)
Sajid Hussain, Hui Guo, Tuo Li, Hassaan Saadat, Sri Parameswaran
COPS: A complete oblivious processing system. Microprocess. Microsystems 85 (2021)
Georgios Zervakis, Hassaan Saadat, Hussam Amrouch, Andreas Gerstlauer, Sri Parameswaran, Jörg Henkel
Approximate Computing for ML: State-of-the-art, Challenges and Visions. ASP-DAC (2021)
Darshana Jayasinghe, Aleksandar Ignjatovic, Sri Parameswaran
UCloD: Small Clock Delays to Mitigate Remote Power Analysis Attacks. IEEE Access 9 (2021)
Hsu-Kang Dow, Tuo Li, William Miles, Sri Parameswaran
SHORE: Hardware/Software Method for Memory Safety Acceleration on RISC-V. DAC (2021)
Hassaan Saadat, Haris Javaid, Aleksandar Ignjatovic, Sri Parameswaran
WEID: Worst-case Error Improvement in Approximate Dividers. ASP-DAC (2020)
Hasindu Gamaarachchi, Arash Bayat, Bruno Gaëta, Sri Parameswaran
Cache Friendly Optimisation of de Bruijn Graph Based Local Re-Assembly in Variant Calling. IEEE ACM Trans. Comput. Biol. Bioinform. 17 (4) (2020)
Hasindu Gamaarachchi, Wai Chun Lam, Gihan Jayatilaka, Hiruna Samarakoon, Jared T. Simpson, Martin A. Smith, Sri Parameswaran
GPU accelerated adaptive banded event alignment for rapid comparative nanopore signal analysis. BMC Bioinform. 21 (1) (2020)
Arash Bayat, Nandan P. Deshpande, Marc R. Wilkins, Sri Parameswaran
Fast Short Read De-Novo Assembly Using Overlap-Layout-Consensus Approach. IEEE ACM Trans. Comput. Biol. Bioinform. 17 (1) (2020)
Tuo Li, Bradley Hopkins, Sri Parameswaran
SIMF: Single-Instruction Multiple-Flush Mechanism for Processor Temporal Isolation. CoRR (2020)
Hassaan Saadat, Haris Javaid, Aleksandar Ignjatovic, Sri Parameswaran
REALM: Reduced-Error Approximate Log-based Integer Multiplier. DATE (2020)
Ann Franchesca Laguna, Hasindu Gamaarachchi, Xunzhao Yin, Michael T. Niemier, Sri Parameswaran, Xiaobo Sharon Hu
Seed-and-Vote based In-Memory Accelerator for DNA Read Mapping. ICCAD (2020)
Farah Abid, Darshana Jayasinghe, Sompasong Somsavaddy, Sri Parameswaran
LFTSM: Lightweight and Fully Testable SEU Mitigation System for Xilinx Processor-Based SoCs. FPL (2020)
Amin Malekpour, Roshan G. Ragel, Tuo Li, Haris Javaid, Aleksandar Ignjatovic, Sri Parameswaran
Hardware Trojan Mitigation in Pipelined MPSoCs. ACM Trans. Design Autom. Electr. Syst. 25 (1) (2020)
Hassaan Saadat, Tuo Li, Haris Javaid, Sri Parameswaran
A Sub-Range Error Characterization based Selection Methodology for Approximate Arithmetic Units. VLSI Design (2020)
Vikkitharan Gnanasambandapillai, Jorgen Peddersen, Roshan G. Ragel, Sri Parameswaran
FINDER: Find Efficient Parallel Instructions for ASIPs to Improve Performance of Large Applications. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39 (11) (2020)
Hassaan Saadat, Haris Javaid, Sri Parameswaran
Approximate Integer and Floating-Point Dividers with Near-Zero Error Bias. DAC (2019)
Arash Bayat, Bruno Gaëta, Aleksandar Ignjatovic, Sri Parameswaran
Pairwise alignment of nucleotide sequences using maximal exact matches. BMC Bioinform. 20 (1) (2019)
Amin Malekpour, Roshan G. Ragel, Daniel Murphy, Aleksandar Ignjatovic, Sri Parameswaran
Hardware Trojan Detection and Recovery in MPSoCs via On-line Application Specific Testing. DDECS (2019)
Darshana Jayasinghe, Aleksandar Ignjatovic, Sri Parameswaran
SCRIP: Secure Random Clock Execution on Soft Processor Systems to Mitigate Power-based Side Channel Attacks. ICCAD (2019)
Darshana Jayasinghe, Aleksandar Ignjatovic, Sri Parameswaran
RFTC: Runtime Frequency Tuning Countermeasure Using FPGA Dynamic Reconfiguration to Mitigate Power Analysis Attacks. DAC (2019)
Ram Prasad Mohanty, Hasindu Gamaarachchi, Andrew J. Lambert, Sri Parameswaran
SWARAM: Portable Energy and Cost Efficient Embedded System for Genomic Processing. ACM Trans. Embed. Comput. Syst. 18 (5s) (2019)
Mubashir Hussain, Amin Malekpour, Hui Guo, Sri Parameswaran
EETD: An Energy Efficient Design for Runtime Hardware Trojan Detection in Untrusted Network-on-Chip. ISVLSI (2018)
Sri Parameswaran, R. Iris Bahar, David Z. Pan
Conference Reports: Report on the 2017 International Conference on Computer-Aided Design (ICCAD). IEEE Des. Test 35 (2) (2018)
Vikkitharan Gnanasambandapillai, Arash Bayat, Sri Parameswaran
MESGA: An MPSoC based embedded system solution for short read genome alignment. ASP-DAC (2018)
Hassaan Saadat, Haseeb Bokhari, Sri Parameswaran
Minimally Biased Multipliers for Approximate Integer and Floating-Point Multiplication. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37 (11) (2018)
Florencia Irena, Daniel Murphy, Sri Parameswaran
CryptoBlaze: A partially homomorphic processor with multiple instructions and non-deterministic encryption support. ASP-DAC (2018)
Hassaan Saadat, Sri Parameswaran
Hardware approximate computing: how, why, when and where? (special session). CASES (2017)
Arash Bayat, Bruno Gaëta, Aleksandar Ignjatovic, Sri Parameswaran
Improved VCF normalization for accurate VCF comparison. Bioinform. 33 (7) (2017)
Amin Malekpour, Roshan G. Ragel, Aleksandar Ignjatovic, Sri Parameswaran
TrojanGuard: Simple and Effective Hardware Trojan Mitigation Techniques for Pipelined MPSoCs. DAC (2017)
Pasindu Aluthwala, Neil Weste, Andrew Adams, Torsten Lehmann, Sri Parameswaran
Partial Dynamic Element Matching Technique for Digital-to-Analog Converters Used for Digital Harmonic-Cancelling Sine-Wave Synthesis. IEEE Trans. Circuits Syst. I Regul. Pap. (2) (2017)
Tao Liu, Hui Guo, Sri Parameswaran, Xiaobo Sharon Hu
iCETD: An improved tag generation design for memory data authentication in embedded processor systems. Integr. 56 (2017)
Amin Malekpour, Roshan G. Ragel, Aleksandar Ignjatovic, Sri Parameswaran
DoSGuard: Protecting pipelined MPSoCs against hardware Trojan based DoS attacks. ASAP (2017)
Darshana Jayasinghe, Aleksandar Ignjatovic, Sri Parameswaran
NORA: Algorithmic Balancing without Pre-charge to Thwart Power Analysis Attacks. VLSI Design (2017)
Tuo Li, Muhammad Shafique, Jude Angelo Ambrose, Jörg Henkel, Sri Parameswaran
Fine-Grained Checkpoint Recovery for Application-Specific Instruction-Set Processors. IEEE Trans. Computers 66 (4) (2017)
Sri Parameswaran
Social Presence in Social Media: Persuasion, Design and Discourse. SIGMIS-CPR (2017)
Tao Liu, Hui Guo, Sri Parameswaran, Xiaobo Sharon Hu
Improving tag generation for memory data authentication in embedded processor systems. ASP-DAC (2016)
Pasindu Aluthwala, Neil Weste, Andrew Adams, Torsten Lehmann, Sri Parameswaran
The effect of amplitude resolution and mismatch on a digital-to-analog converter used for digital harmonic-cancelling sine-wave synthesis. ISCAS (2016)
Tuo Li, Jude Angelo Ambrose, Sri Parameswaran
RECORD: Reducing register traffic for checkpointing in embedded processors. DATE (2016)
Darshana Jayasinghe, Shivam Bhasin, Sri Parameswaran, Aleksandar Ignjatovic
Does it sound as it claims: a detailed side-channel security analysis of QuadSeal countermeasure. Conf. Computing Frontiers (2016)
Nastaran Nemati, Mark C. Reed, Sri Parameswaran, Karl M. Fant
Self-timed automatic test pattern generation for null convention logic. MWSCAS (2016)
Tuo Li, Jude Angelo Ambrose, Roshan G. Ragel, Sri Parameswaran
Processor Design for Soft Errors: Challenges and State of the Art. ACM Comput. Surv. 49 (3) (2016)
Hans Michael Gerndt, Michael Glaß, Sri Parameswaran, Barry L. Rountree
Dark Silicon: From Embedded to HPC Systems (Dagstuhl Seminar 16052). Dagstuhl Reports 6 (1) (2016)
Isuru Nawinne, Haris Javaid, Roshan G. Ragel, Sri Parameswaran
Switchable cache: utilising dark silicon for application specific cache optimisations. IET Comput. Digit. Tech. 10 (4) (2016)
Sri Parameswaran
Editorial Introduction of New Editor-in-Chief and Associate Editors. IEEE Embed. Syst. Lett. 8 (1) (2016)
Isuru Nawinne, Haris Javaid, Roshan G. Ragel, Swarnalatha Radhakrishnan, Sri Parameswaran
Exploring Multilevel Cache Hierarchies in Application Specific MPSoCs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 34 (12) (2015)
Jude Angelo Ambrose, Tuo Li, Daniel Murphy, Shivam Gargg, Nick Higgins, Sri Parameswaran
ARGUS: A Framework for Rapid Design and Prototype of Heterogeneous Multicore Systems in FPGA. VLSI Design (2015)
Roshan G. Ragel, Jude Angelo Ambrose, Sri Parameswaran
SecureD: A Secure Dual Core Embedded Processor. CoRR (2015)
Pasindu Aluthwala, Neil Weste, Andrew Adams, Torsten Lehmann, Sri Parameswaran
Design of a digital harmonic-cancelling sine-wave synthesizer with 100 MHz output frequency, 43.5 dB SFDR, and 2.26 mW power. ISCAS (2015)
Josef Schneider, Jorgen Peddersen, Sri Parameswaran
Speeding up single pass simulation of PLRUt caches. ASP-DAC (2015)
Haseeb Bokhari, Haris Javaid, Muhammad Shafique, Jörg Henkel, Sri Parameswaran
Malleable NoC: dark silicon inspired adaptable Network-on-Chip. DATE (2015)
Liang Tang, Jude Angelo Ambrose, Akash Kumar, Sri Parameswaran
Dynamic reconfigurable puncturing for secure wireless communication. DATE (2015)
Jude Angelo Ambrose, Nick Higgins, Mrinal Chakravarthy, Shivam Gargg, Tuo Li, Daniel Murphy, Aleksandar Ignjatovic, Sri Parameswaran
ARCHER: Communication-based predictive architecture selection for application specific multiprocessor Systems-on-Chip. ISCAS (2015)
Mohammad Shihabul Haque, Jorgen Peddersen, Andhi Janapsatya, Sri Parameswaran
DEW: A Fast Level 1 Cache Simulation Approach for Embedded Processors with FIFO Replacement Policy. CoRR (2015)
Su Myat Min Shwe, Kapil Batra, Yusuke Yachide, Jorgen Peddersen, Sri Parameswaran
RAPITIMATE: Rapid performance estimation of pipelined processing systems containing shared memory. ICCD (2015)
Jude Angelo Ambrose, Roshan G. Ragel, Darshana Jayasinghe, Tuo Li, Sri Parameswaran
Side channel attacks in embedded systems: A tale of hostilities and deterrence. ISQED (2015)
Mohammad Shihabul Haque, Jorgen Peddersen, Sri Parameswaran
CIPARSim: Cache Intersection Property Assisted Rapid Single-pass FIFO Cache Simulation Technique. CoRR (2015)
Darshana Jayasinghe, Aleksandar Ignjatovic, Jude Angelo Ambrose, Roshan G. Ragel, Sri Parameswaran
QuadSeal: Quadruple algorithmic symmetrizing countermeasure against power based side-channel attacks. CASES (2015)
Haseeb Bokhari, Haris Javaid, Muhammad Shafique, Jörg Henkel, Sri Parameswaran
SuperNet: multimode interconnect architecture for manycore chips. DAC (2015)
Jörg Henkel, Haseeb Bokhari, Siddharth Garg, Muhammad Usman Karim Khan, Heba Khdr, Florian Kriebel, Ümit Y. Ogras, Sri Parameswaran, Muhammad Shafique
Dark Silicon: From Computation to Communication. NOCS (2015)
Xi Zhang, Haris Javaid, Muhammad Shafique, Jude Angelo Ambrose, Jörg Henkel, Sri Parameswaran
ADAPT: An adaptive manycore methodology for software pipelined applications. ASP-DAC (2015)
Jude Angelo Ambrose, Yusuke Yachide, Kapil Batra, Jorgen Peddersen, Sri Parameswaran
Sequential C-code to distributed pipelined heterogeneous MPSoC synthesis for streaming applications. ICCD (2015)
Xi Zhang, Haris Javaid, Muhammad Shafique, Jorgen Peddersen, Jörg Henkel, Sri Parameswaran
E-pipeline: elastic hardware/software pipelines on a many-core fabric. DATE (2015)
Haris Javaid, Yusuke Yachide, Su Myat Min Shwe, Haseeb Bokhari, Sri Parameswaran
FALCON: A Framework for HierarchicAL Computation of Metrics for CompONent-Based Parameterized SoCs. DAC (2014)
Darshana Jayasinghe, Roshan G. Ragel, Jude Angelo Ambrose, Aleksandar Ignjatovic, Sri Parameswaran
Advanced modes in AES: Are they safe from power analysis based side channel attacks? ICCD (2014)
Hong Chinh Doan, Haris Javaid, Sri Parameswaran
Flexible and scalable implementation of H.264/AVC encoder for multiple resolutions using ASIPs. DATE (2014)
Josef Schneider, Jorgen Peddersen, Sri Parameswaran
MASH{fifo}: A Hardware-Based Multiple Cache Simulator for Rapid FIFO Cache Analysis. DAC (2014)
Muhammad Shafique, Siddharth Garg, Tulika Mitra, Sri Parameswaran, Jörg Henkel
Dark silicon as a challenge for hardware/software co-design. CODES+ISSS (2014)
Liang Tang, Jude Angelo Ambrose, Sri Parameswaran, Sha Zhu
Reconfigurable Convolutional Codec for Physical Layer Communication Security Application. MILCOM (2014)
Haris Javaid, Muhammad Shafique, Jörg Henkel, Sri Parameswaran
Energy-Efficient Adaptive Pipelined MPSoCs for Multimedia Applications. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 33 (5) (2014)
Pasindu Aluthwala, Neil Weste, Andrew Adams, Torsten Lehmann, Sri Parameswaran
A simple digital architecture for a harmonic-cancelling sine-wave synthesizer. ISCAS (2014)
Josef Schneider, Jorgen Peddersen, Sri Parameswaran
A scorchingly fast FPGA-based Precise L1 LRU cache simulator. ASP-DAC (2014)
Isuru Nawinne, Josef Schneider, Haris Javaid, Sri Parameswaran
Hardware-based fast exploration of cache hierarchies in application specific MPSoCs. DATE (2014)
Jude Angelo Ambrose, Jorgen Peddersen, Sri Parameswaran, Alvin Labios, Yusuke Yachide
SDG2KPN: System Dependency Graph to function-level KPN generation of legacy code for MPSoCs. ASP-DAC (2014)
Haseeb Bokhari, Haris Javaid, Muhammad Shafique, Jörg Henkel, Sri Parameswaran
darkNoC: Designing Energy-Efficient Network-on-Chip with Multi-Vt Cells for Dark Silicon. DAC (2014)
Haris Javaid, Aleksandar Ignjatovic, Sri Parameswaran
Performance Estimation of Pipelined MultiProcessor System-on-Chips (MPSoCs). IEEE Trans. Parallel Distributed Syst. 25 (8) (2014)
Sri Parameswaran
Mapping programs for execution on pipelined MPSoCs. ESTIMedia (2014)
Su Myat Min, Haris Javaid, Sri Parameswaran
RExCache: Rapid exploration of unified last-level cache. ASP-DAC (2013)
Tuo Li, Muhammad Shafique, Jude Angelo Ambrose, Semeen Rehman, Jörg Henkel, Sri Parameswaran
RASTER: runtime adaptive spatial/temporal error resiliency for embedded processors. DAC (2013)
Liang Tang, Jude Angelo Ambrose, Sri Parameswaran
Reconfigurable pipelined coprocessor for multi-mode communication transmission. DAC (2013)
Haseeb Bokhari, Haris Javaid, Sri Parameswaran
System-level optimization of on-chip communication using express links for throughput constrained MPSoCs. ESTIMedia (2013)
Haris Javaid, Daniel Witono, Sri Parameswaran
Multi-mode pipelined MPSoCs for streaming applications. ASP-DAC (2013)
Roshan G. Ragel, Swarnalatha Radhakrishnan, Jude Angelo Ambrose, Sri Parameswaran
A Study on Instruction-set Selection Using Multi-application Based Application Specific Instruction-set Processors. VLSI Design (2013)

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Publication Activity (10 Years)

Top Topics

Top Venues

Sri Parameswaran