Nastaran Nemati

Publication Activity (10 Years)

Years Active: 2009-2018
Publications (10 Years): 3

Top Topics

Parallel Hardware

Automated Reasoning

Built In Self Test

Statistical Significance

Top Venues

IEEE Trans. Emerg. Top. Comput.

Publications

Nastaran Nemati, Paul Beckett, Mark C. Reed, Karl M. Fant
Clock-Less DFT-Less Test Strategy for Null Convention Logic. IEEE Trans. Emerg. Top. Comput. 6 (4) (2018)
Nastaran Nemati, Mark C. Reed, Karl M. Fant, Paul Beckett
Asynchronous interleaved scan architecture for on-line built-in self-test of null convention logic. ISCAS (2016)
Nastaran Nemati, Mark C. Reed, Sri Parameswaran, Karl M. Fant
Self-timed automatic test pattern generation for null convention logic. MWSCAS (2016)
Nastaran Nemati, Mark C. Reed, Michael R. Frater
Asynchronous test hardware for Null Convention Logic. ISCAS (2014)
Nastaran Nemati, Zainalabedin Navabi
Adaptation of Standard RT Level BIST Architectures for System Level Communication Testing. Asian Test Symposium (2011)
Niki Shakeri, Nastaran Nemati, Majid Nili Ahmadabadi, Zainalabedin Navabi
Near optimal machine learning based random test generation. EWDTS (2010)
Nastaran Nemati, Majid Namaki-Shoushtari, Zainalabedin Navabi
A mixed HDL/PLI test package. EWDTS (2010)
Arezoo Kamran, Nastaran Nemati, Somayeh Sadeghi Kohan, Zainalabedin Navabi
Virtual tester development using HDL/PLI. EWDTS (2010)
Nastaran Nemati, Amirhossein Simjour, Amirali Ghofrani, Zainalabedin Navabi
Optimizing Parametric BIST Using Bio-inspired Computing Algorithms. DFT (2009)