Héctor Pettenghi

Publication Activity (10 Years)

Years Active: 2004-2024
Publications (10 Years): 8

Top Topics

Chinese Remainder Theorem

Top Venues

Circuits Syst. Signal Process.

Int. J. Circuit Theory Appl.

Publications

Gabriel Fernandes, Augusto Vassoler, Eduardo Bezerra, Leonel Sousa, Héctor Pettenghi
A Comprehensive Approach and Analysis of Reverse Converters for a Class of Moduli Sets. LASCAS (2024)
Vanessa Prediger, Fábio Bairros, Laio Oriel Seman, Eduardo Augusto Bezerra, Héctor Pettenghi
±1. Int. J. Circuit Theory Appl. 51 (7) (2023)
Leonel Sousa, Rogerio Paludo, Paulo Martins, Héctor Pettenghi
Towards the Integration of Reverse Converters into the RNS Channels. IEEE Trans. Computers 69 (3) (2020)
Fabian L. Cabrera, Fernando Rangel de Sousa, Héctor Pettenghi
Introducing Asymmetry in a CMOS Latch to Obtain Inherent Power-On-Reset Behavior. LASCAS (2019)
Héctor Pettenghi, Rogerio Paludo, Roberto de Matos, Pavel A. Lyakhov
Efficient RNS Reverse Converters for Moduli Sets with Dynamic Ranges Up to \((10n+1)\) -bit. Circuits Syst. Signal Process. 37 (11) (2018)
Roberto de Matos, Rogerio Paludo, Nikolay I. Chervyakov, Pavel A. Lyakhov, Héctor Pettenghi
Efficient implementation of modular multiplication by constants applied to RNS reverse converters. ISCAS (2017)
Héctor Pettenghi, Roberto de Matos, Amir Sabbagh Molahosseini
RNS reverse converters for moduli sets with dynamic ranges of 9n-bit. LASCAS (2016)
Héctor Pettenghi, Ricardo Chaves, Roberto de Matos, Leonel Sousa
Method for designing two levels RNS reverse converters for large dynamic ranges. Integr. 55 (2016)
Héctor Pettenghi, Leonel Sousa
RNS reverse converters based on the new Chinese Remainder Theorem I. ISCAS (2015)
Héctor Pettenghi, Jude Angelo Ambrose, Ricardo Chaves, Leonel Sousa
Method for designing multi-channel RNS architectures to prevent power analysis SCA. ISCAS (2014)
Héctor Pettenghi, Frederico Pratas, Leonel Sousa
Method for Designing Efficient Mixed Radix Multipliers. Circuits Syst. Signal Process. 33 (10) (2014)
Héctor Pettenghi, Sorin Cotofana, Leonel Sousa
± k} Multipliers. J. Circuits Syst. Comput. 23 (1) (2014)
Héctor Pettenghi, Ricardo Chaves, Leonel Sousa
Method to Design General RNS Reverse Converters for Extended Moduli Sets. IEEE Trans. Circuits Syst. II Express Briefs (12) (2013)
Héctor Pettenghi, Ricardo Chaves, Leonel Sousa
RNS Reverse Converters for Moduli Sets With Dynamic Ranges up to (8n+1)-bit. IEEE Trans. Circuits Syst. I Regul. Pap. (6) (2013)
Jude Angelo Ambrose, Héctor Pettenghi, Leonel Sousa
DARNS: A randomized multi-modulo RNS architecture for double-and-add in ECC to prevent power analysis side channel attacks. ASP-DAC (2013)
Jude Angelo Ambrose, Héctor Pettenghi, Darshana Jayasinghe, Leonel Sousa
Randomised multi-modulo residue number system architecture for double-and-add to prevent power analysis side channel attacks. IET Circuits Devices Syst. 7 (5) (2013)
Héctor Pettenghi, Leonel Sousa, Jude Angelo Ambrose
Efficient implementation of multi-moduli architectures for Binary-to-RNS conversion. ASP-DAC (2012)
Pedro Miguens Matutino, Héctor Pettenghi, Ricardo Chaves, Leonel Sousa
RNS Arithmetic Units for Modulo {2^n+-k}. DSD (2012)
Héctor Pettenghi, Ricardo Chaves, Leonel Sousa, Maria J. Avedillo
+/- k based on threshold logic. VLSI-SoC (2010)
José M. Quintana, Maria J. Avedillo, Juan Núñez, Héctor Pettenghi
Operation Limits for RTD-Based MOBILE Circuits. IEEE Trans. Circuits Syst. I Regul. Pap. (2) (2009)
Héctor Pettenghi, Maria J. Avedillo, José M. Quintana
Using multi-threshold threshold gates in RTD-based logic design: A case study. Microelectron. J. 39 (2) (2008)
Héctor Pettenghi, Maria J. Avedillo, José M. Quintana
A novel contribution to the RTD-based threshold logic family. ISCAS (2008)
Héctor Pettenghi, Maria J. Avedillo, José M. Quintana
Non Return Mobile Logic Family. ISCAS (2007)
José M. Quintana, Maria J. Avedillo, Héctor Pettenghi
Self-latching operation limits for MOBILE circuits. ISCAS (2006)
Maria J. Avedillo, José M. Quintana, Héctor Pettenghi
Logic Models Supporting the Design of MOBILE-based RTD Circuits. ASAP (2005)
José M. Quintana, Maria J. Avedillo, Héctor Pettenghi
Programmable logic gate based on resonant tunnelling devices. ISCAS (3) (2004)