Logic Models Supporting the Design of MOBILE-based RTD Circuits.
Maria J. AvedilloJosé M. QuintanaHéctor PettenghiPublished in: ASAP (2005)
Keyphrases
- logic synthesis
- digital circuits
- chip design
- logic circuits
- circuit design
- design process
- probabilistic model
- temporal logic
- built in self test
- fault models
- modelling language
- design space
- mobile applications
- neural network
- statistical models
- context aware
- knowledge based systems
- high speed
- mobile devices
- artificial neural networks
- case study
- learning algorithm