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Parallel HEVC Decoding on Multi- and Many-core Architectures - A Power and Performance Analysis.
Chi Ching Chi
Mauricio Alvarez Mesa
Jan Lucas
Ben H. H. Juurlink
Thomas Schierl
Published in:
J. Signal Process. Syst. (2013)
Keyphrases
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multi core processors
power consumption
parallel architectures
computer vision
parallel processing
decoding algorithm
image coding
parallel computation
distributed memory
decoding process