• search
    search
  • reviewers
    reviewers
  • feeds
    feeds
  • assignments
    assignments
  • settings
  • logout

Parallel HEVC Decoding on Multi- and Many-core Architectures - A Power and Performance Analysis.

Chi Ching ChiMauricio Alvarez MesaJan LucasBen H. H. JuurlinkThomas Schierl
Published in: J. Signal Process. Syst. (2013)
Keyphrases
  • multi core processors
  • power consumption
  • parallel architectures
  • computer vision
  • parallel processing
  • decoding algorithm
  • image coding
  • parallel computation
  • distributed memory
  • decoding process