Yu-Jen Huang

Publication Activity (10 Years)

Years Active: 2005-2022
Publications (10 Years): 4

Top Topics

Content Addressable

Convolutional Neural Networks

Stainless Steel

Top Venues

ACM Trans. Embed. Comput. Syst.

J. Inf. Sci. Eng.

ICPR Workshops (4)

Publications

Chia-Chien Wei, Yu-Jen Huang, Zhen-Xiong Xie, Ping-Yao Huang, Pin-Hsuan Ting, Chun-Ting Lin
>100 Gbps 3×3 MIMO V-Band RoF System for up to 100 m Wireless Transmission Enabled by NN-based Equalization. OFC (2022)
Yu-Jen Huang, Guan-Ting Lin, Pin-Hsuan Ting, Zheng-Wei Huang, Shao-Hung Yu, Yi-Jun Cai, Chia-Chien Wei, Sien Chi, Chun-Ting Lin
Mobile 14-GHz Bandwidth Fronthaul Link Supporting 128 RF-Chain Signals for 6G Ma-MIMO Beamforming. OFC (2022)
Liang-Wei Tao, An-Fong Hwu, Yu-Jen Huang, Chi-Chung Chen, Chao-Yuan Yeh, Shih-Hao Hung
End-to-End Performance Optimization for Training Streaming Convolutional Neural Networks using Billion-Pixel Whole-Slide Images. IEEE BigData (2021)
Yu-Jen Huang, Ko-Wei Huang, Shih-Hsiung Lee
Defect Detection of Stainless Steel Plates Using Deep Learning Technology. ICPR Workshops (4) (2020)
Chung-Ming Huang, Yuan-Tse Yu, Yu-Jen Huang
A Cross-layer Loss Discrimination Scheme for DCCP over the Wireless Network. ANT/SEIT (2014)
Yu-Jen Huang, Jin-Fu Li
Yield-enhancement schemes for multicore processor and memory stacked 3D ICs. ACM Trans. Embed. Comput. Syst. 13 (3s) (2014)
Yu-Jen Huang, Mark T. Bolas, Evan A. Suma
Fusing depth, color, and skeleton data for enhanced real-time hand segmentation. SUI (2013)
Che-Wei Chou, Yu-Jen Huang, Jin-Fu Li
A Built-In Self-Repair Scheme for 3-D RAMs With Interdie Redundancy. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 32 (4) (2013)
Chun-Kai Lai, Yu-Jen Huang, Jin-Fu Li
A Self-Repair Technique for Content Addressable Memories with Address-Input-Free Writing Function. J. Inf. Sci. Eng. 29 (3) (2013)
Li-Jung Chang, Yu-Jen Huang, Jin-Fu Li
Area and reliability efficient ECC scheme for 3D RAMs. VLSI-DAT (2012)
Shun-Hsun Yang, Yu-Jen Huang, Jin-Fu Li
A Low-Power Ternary Content Addressable Memory With Pai-Sigma Matchlines. IEEE Trans. Very Large Scale Integr. Syst. 20 (10) (2012)
Yong-Xiao Chen, Yu-Jen Huang, Jin-Fu Li
Test cost optimization technique for the pre-bond test of 3D ICs. VTS (2012)
Yu-Jen Huang, Jin-Fu Li
Built-In Self-Repair Scheme for the TSVs in 3-D ICs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 31 (10) (2012)
Yu-Jen Huang, Jin-Fu Li
Low-Cost Self-Test Techniques for Small RAMs in SOCs Using Enhanced IEEE 1500 Test Wrappers. IEEE Trans. Very Large Scale Integr. Syst. 20 (11) (2012)
Yu-Jen Huang, Jin-Fu Li, Che-Wei Chou
Post-bond test techniques for TSVs with crosstalk faults in 3D ICs. VLSI-DAT (2012)
Yu-Jen Huang, Jin-Fu Li, Ji-Jan Chen, Ding-Ming Kwai, Yung-Fa Chou, Cheng-Wen Wu
A built-in self-test scheme for the post-bond test of TSVs in 3D ICs. VTS (2011)
Tsu-Wei Tseng, Yu-Jen Huang, Jin-Fu Li
DABISR: A Defect-Aware Built-In Self-Repair Scheme for Single/Multi-Port RAMs in SoCs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 29 (10) (2010)
Jin-Fu Li, Yu-Jen Huang, Yong-Jyun Hu
Testing Random Defect and Process Variation Induced Comparison Faults of TCAMs With Asymmetric Cells. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 29 (11) (2010)
Yu-Jen Huang, Yun-Chao You, Jin-Fu Li
Enhanced IEEE 1500 test wrapper for testing small RAMs in SOCs. SoCC (2010)
Yu-Jen Huang, Che-Wei Chou, Jin-Fu Li
A low-cost built-in self-test scheme for an array of memories. ETS (2010)
Hsiang-Ning Liu, Yu-Jen Huang, Jin-Fu Li
Memory Built-in Self Test in Multicore Chips with Mesh-Based Networks. IEEE Micro 29 (5) (2009)
Yong-Jyun Hu, Yu-Jen Huang, Jin-Fu Li
Modeling and Testing Comparison Faults of TCAMs with Asymmetric Cells. VTS (2009)
Yu-Jen Huang, Jin-Fu Li
Testability Exploration of 3-D RAMs and CAMs. Asian Test Symposium (2009)
Da-Ming Chang, Jin-Fu Li, Yu-Jen Huang
A Built-In Redundancy-Analysis Scheme for Random Access Memories with Two-Level Redundancy. J. Electron. Test. 24 (1-3) (2008)
Yu-Jen Huang, Jin-Fu Li
A Low-Cost Pipelined BIST Scheme for Homogeneous RAMs in Multicore Chips. ATS (2008)
Yu-Jen Huang, Jin-Fu Li
Testing ternary content addressable memories with active neighbourhood pattern-sensitive faults. IET Comput. Digit. Tech. 1 (3) (2007)
Tsu-Wei Tseng, Chun-Hsien Wu, Yu-Jen Huang, Jin-Fu Li, Alex Pao, Kevin Chiu, Eliot Chen
A Built-In Self-Repair Scheme for Multiport RAMs. VTS (2007)
Lai-Jiu Lin, Qamrul Hasan Ansari, Yu-Jen Huang
Some existence results for solutions of generalized vector quasi-equilibrium problems. Math. Methods Oper. Res. 65 (1) (2007)
Yu-Jen Huang, Jin-Fu Li
Testing Active Neighborhood Pattern-Sensitive Faults of Ternary Content Addressable Memories. ETS (2006)
Yu-Jen Huang, Da-Ming Chang, Jin-Fu Li
A Built-In Redundancy-Analysis Scheme for Self-Repairable RAMs with Two-Level Redundancy. DFT (2006)
Jin-Fu Li, Jiunn-Der Yu, Yu-Jen Huang
A design methodology for hybrid carry-lookahead/carry-select adders with reconfigurability. ISCAS (1) (2005)