Login / Signup
A Low-Cost Pipelined BIST Scheme for Homogeneous RAMs in Multicore Chips.
Yu-Jen Huang
Jin-Fu Li
Published in:
ATS (2008)
Keyphrases
</>
low cost
high end
high speed
computer systems
real time
detection scheme
recognition scheme
digital camera
low power
single chip
integrated circuit
classification scheme
high density
data flow
highly efficient
secret sharing scheme
hardware implementation
parallel architecture
motion estimation