Yoshikazu Morooka

Publication Activity (10 Years)

Years Active: 1985-2009
Publications (10 Years): 0

Publications

Masaru Haraguchi, Tokuya Osawa, Akira Yamazaki, Chikayoshi Morishima, Toshinori Morihara, Yoshikazu Morooka, Yoshihiro Okuno, Kazutami Arimoto
A Continuous-Adaptive DDRx Interface with Flexible Round-Trip-Time and Full Self Loop-Backed AC Test. IEICE Trans. Electron. (4) (2009)
Masaru Haraguchi, Tokuya Osawa, Akira Yamazaki, Chikayoshi Morishima, Toshinori Morihara, Yoshikazu Morooka, Yoshihiro Okuno, Kazutami Arimoto
A Continuous-Adaptive DDR2 Interface with Flexible Round-Trip-Time and Full Self Loop-Backed AC Test. ISSCC (2007)
Yasunobu Nakase, Yoshikazu Morooka, David J. Perlman, Daniel J. Kolor, Jae-Myoung Choi, Hyun J. Shin, Tsutomu Yoshimura, Naoya Watanabe, Yoshio Matsuda, Masaki Kumanoya, Michihiro Yamada
Source-synchronization and timing vernier techniques for 1.2-GB/s SLDRAM interface. IEEE J. Solid State Circuits 34 (4) (1999)
Tadaaki Yamauchi, Yoshikazu Morooka, Hideyuki Ozaki
A low power and high speed data transfer scheme with asynchronous compressed pulse width modulation for AS-Memory. IEEE J. Solid State Circuits 31 (4) (1996)
Yasuhiko Tsukikawa, Takeshi Kajimoto, Yasuhiko Okasaka, Yoshikazu Morooka, Kiyohiro Furutani, Hiroshi Miyamoto, Hideyuki Ozaki
An efficient back-bias generator with hybrid pumping circuit for 1.5-V DRAMs. IEEE J. Solid State Circuits 29 (4) (1994)
Kiyohiro Furutani, Hiroshi Miyamoto, Yoshikazu Morooka, M. Suwa, Hideyuki Ozaki
An adjustable output driver with a self-recovering Vpp generator for a 4M⨉16 DRAM. IEEE J. Solid State Circuits 29 (3) (1994)
Yoshikazu Morooka, Shigeru Mori, Hiroshi Miyamoto, Michihiro Yamada
An Address Maskable Parallel Testing for Ultra High Density DRAMs. ITC (1991)
Hiroshi Miyamoto, Koichiro Mashiko, Yoshikazu Morooka, Kazutami Arimoto, Michihiro Yamada, T. Nakano
Test Pattern Considerations for Fault Tolerant High Density DRAM. ITC (1985)